Serial I/O Mode 1
211
Specifications in this manual are tentative and subject to change
Rev. E
MITSUBISHI MICROCOMPUTERS
M30245 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Data Protection (Block Lock)
Each block in Figure 1.167 has a nonvolatile lock bit that indicates protection (block lock) against erasing/
writing. A block is locked (writing “0” for the lock bit) with the lock bit program command. Any lock bit can
be read with the read lock bit status command.
Block lock disable/enable is determined by the status of the lock bit and execution status of the lock bit
disable and lock bit enable commands.
(1) After reset and the lock bit enable command is executed, the specified block can be locked/unlocked
using the lock bit (lock bit data). Blocks with a “0” lock bit data are locked and cannot be erased or written
to. Blocks with a “1” lock bit data are unlocked and can be erased or written to.
(2) After the lock bit disable command has been executed, all blocks are unlocked regardless of the lock bit
data status and can be erased or written to. In this case, any lock bit data that was “0” before the block was
erased is set to “1” (unlocked) after erasing.
User ROM area
Boot ROM area
Note 1: The boot ROM area can be rewritten only in parallel input/
output mode. (Access to any other areas is inhibited.)
Note 2: To specify a block, use the maximum address in the block
that is an even address.
8K bytes
FE00016
FFFFF16
F000016
Block 3 : 32K bytes
F800016
Block 2 : 8K bytes
FA00016
Block 1 : 8K bytes
Block 0 : 16K bytes
FC00016
FFFFF16
E000016
Block 4 : 64K bytes
Figure 1.167. Block diagram of the flash memory version
Status Register (SRD)
The status register indicates the flash memory operating status and whether an erase or program
operation has terminated normally or in error. It can be read by using the read status register command
(7016). Writing the clear status register command (5016) clears the status register. Table 1.71 defines
each status register bit. After reset, the status register outputs “8016”.
Each SRD bit
Status name
Definition
“1”
“0”
SR7 (Bit 7)
Write state machine (WSM)
Ready
Busy
SR6 (Bit 6)
Reserved
_
SR5 (Bit 5)
Erase status
Terminated in error
Terminated normally
SR4 (Bit 4)
Program status
Terminated in error
Terminated normally
SR4 (Bit 3)
Block status after program
Terminated in error
Terminated normally
SR2 (Bit 2)
Reserved
_
SR1 (Bit 1)
Reserved
_
SR0 (Bit 0)
Reserved
_
Table 1.71. Status register (SRD)