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參數(shù)資料
| 型號： | M30222FGGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 4/236頁 |
| 文件大小： | 1955K |
| 代理商： | M30222FGGP |
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Under
development
1-102
Specifications in this manual are tentative and subject to change
Rev. H
Timer Functions For Three-phase Motor Control
MITSUBISHI MICROCOMPUTERS
M30222 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Sawtooth modulation
To generate a PWM waveform of sawtooth wave modulation, set “1” in the modulation mode select bit
(bit 6 at 034816). Also, set “0” in the Timers A4-1, A1-1, and A2-1 control bit (bit 1 at 034916). In this
mode, the timer registers of Timers A4, A1, and A2 comprise conventional Timers A4, A1, and A2
alone, and reload the corresponding timer register’s content to the counter every time the Timer B2
counter’s content becomes 000016. The effective interrupt output specification bit (bit 1 at 034816) and
the effective interrupt output polarity select bit (bit 0 at 034816) go nullified.
An example of U phase waveform is shown in Figure 1.76, and the description of waveform output
workings is given below. Set “1” in DU0 (bit 0 at 034A16), and set “0” in DUB0 (bit 1 at 034A16). In
addition, set “0” in DU1 (bit 0 at 034A16) and set “1” in DUB1 (bit 1 at 034A16).
When the Timer B2 counter’s content becomes 000016, Timer B2 generates an interrupt, and Timer
A4 starts outputting one-shot pulses at the same time. In this instance, the contents of the three-phase
buffer registers DU1 and DU0 are set in the three-phase output shift register (U phase), and the
contents of DUB1 and DUB0 are set in the three-phase output register (U phase). After this, the three-
phase buffer register’s content is set in the three-phase shift register every time the Timer B2
counter’s content becomes 000016.
The value of DU0 and that of DUB0 are output to the U terminal (P80) and to the U terminal (P81)
respectively. When the timer A4 counter counts the value written to Timer A4 (038F16, 038E16) and
when Timer A4 finishes outputting one-shot pulses, the three-phase output shift register’s content is
shifted one position, and the value of DU1 and that of DUB1 are output to the U phase output signal
and to the U output signal respectively. At this time, one-shot pulses are output from the timer for
setting dead time used for setting the time over which the “L” level of the U phase waveform doesn’t
lap over the “L” level of the U phase waveform, which has the opposite phase of the former. The U
phase waveform output that started from the “H” level keeps its level until the timer for setting dead
time finishes outputting one-shot pulses even though the three-phase output shift register’s content
changes from “1” to “0 ”by the effect of the one-shot pulses. When the timer for setting dead time
finishes outputting one-shot pulses, 0 already shifted in the three-phase shift register goes effective,
and the U phase waveform changes to the “L” level. When the Timer B2 counter’s content becomes
000016, the contents of the three-phase buffer registers DU1 and DU0 are set in the three-phase shift
register (U phase), and the contents of DUB1 and DUB0 are set in the three-phase shift register (U
phase) again.
A U phase waveform is generated by these workings repeatedly. With the exception that the three-
phase output shift register on the U phase side is used, the workings in generating a U phase wave-
form, which has the opposite phase of the U phase waveform, are the same as in generating a U
phase waveform. In this way, a waveform can be picked up from the applicable terminal in a manner
in which the “L” level of the U phase waveform doesn’t lap over that of the U phase waveform, which
has the opposite phase of the U phase waveform. The width of the “L” level too can be adjusted by
varying the values of Timer B2 and Timer A4. In dealing with the V and W phases, and V and W
phases, the latter are of opposite phase of the former, have the corresponding timers work similarly to
dealing with the U and U phases to generate an intended waveform.
Setting “1” both in DUB0 and in DUB1 provides a means to output the U phase alone and to fix the U
phase output to “H” as shown in Figure 1.77.
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