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參數(shù)資料
| 型號(hào)： | M30222FGGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 235/236頁 |
| 文件大小： | 1955K |
| 代理商： | M30222FGGP |
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Under
development
1-99
Specifications in this manual are tentative and subject to change
Rev. H
Timer Functions for Three-phase Motor Control
MITSUBISHI MICROCOMPUTERS
M30222 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Delta modulation
To generate a PWM waveform of triangular wave modulation, set “0” in the modulation mode select bit (bit 6
at 034816). Also, set “1” in the Timers A4-1, A1-1, A2-1 control bit (bit 1 at 034916). In this mode, each of
Timers A4, A1, and A2 has two timer registers, and alternately reloads the timer register’s content to the
counter every time Timer B2 counter’s content becomes 000016. If “1” is set to the effective interrupt output
specification bit (bit 1 at 034816), the frequency of interrupt requests that occur every time the Timer B2
counter’s value becomes 000016 can be set by use of the Timer B2 counter (034D16) . The frequency of
occurrences is dependent on the reload value of Timer B2. The reload value cannot be "0".
Setting “1” in the effective interrupt output specification bit (bit 1 at 034816) provides the means to choose
which value of the Timer A1 reload control signal to use, “0” or “1”, to cause Timer B2’s interrupt request to
occur. To make this selection, use the effective interrupt output polarity selection bit (bit 0 at 034816).
An example of U phase waveform is shown in Figure 1.74, and the description of waveform output workings
is given below. Set “1” in DU0 (bit 0 at 034A16). And set “0” in DUB0 (bit 1 at 034A16). In addition, set “0” in
DU1 (bit 0 at 034B16) and set “1” in DUB1 (bit 1 at 034B16). Also, set “0” in the effective interrupt output
specification bit (bit 1 at 034816) to set a value in the timer B2 interrupt occurrence frequency set counter. By
this setting, a Timer B2 interrupt occurs when the Timer B2 counter’s content becomes 000016 as many as
(setting) times. Furthermore, set “1” in the effective interrupt output specification bit (bit 1 at 034816), set in
the effective interrupt polarity select bit (bit 0 at 034816) and set "1" in the interrupt occurrence frequency set
counter (034D16). These settings cause a Timer B2 interrupt to occur every other interval when the U phase
output goes to “H”.
When the Timer B2 counter’s content becomes 000016, Timer A4 starts outputting one-shot pulses. In this
instance, the content of DU1 (bit 0 at 034B16) and that of DU0 (bit 0 at 034A16) are set in the three-phase
output shift register (U phase), the content of DUB1 (bit 1 at 034B16) and that of DUB0 (bit 1 at 034A16) are
set in the three-phase shift register (U phase). After triangular wave modulation mode is selected, however,
no setting is made in the shift register even though the Timer B2 counter’s content becomes 000016.
The value of DU0 and that of DUB0 are output to the U terminal (P80) and to the U terminal (P81) respec-
tively. When the Timer A4 counter counts the value written to Timer A4 (038F16, 038E16) and when Timer A4
finishes outputting one-shot pulses, the three-phase shift register’s content is shifted one position, and the
value of DU1 and that of DUB1 are output to the U phase output signal and to U phase output signal respec-
tively. At this time, one-shot pulses are output from the timer for setting dead time used for setting the time
over which the “L” level of the U phase waveform does not lap over the “L” level of the U phase waveform,
which has the opposite phase of the former. The U phase waveform output that started from the “H” level
keeps its level until the timer for setting dead time finishes outputting one-shot pulses even though the three-
phase output shift register’s content changes from “1” to “0” by the effect of the one-shot pulses. When the
timer for setting dead time finishes outputting one-shot pulses, "0" already shifted in the three-phase shift
register goes effective, and the U phase waveform changes to the "L" level. When the Timer B2 counter’s
content becomes 000016, the Timer A4 counter starts counting the value written to Timer A4-1 (034716,
034616), and starts outputting one-shot pulses. When Timer A4 finishes outputting one-shot pulses, the three-
phase shift register’s content is shifted one position, but if the three-phase output shift register’s content
changes from “0” to “1” as a result of the shift, the output level changes from “L” to “H” without waiting for the
timer for setting dead time to finish outputting one-shot pulses. A U phase waveform is generated by these
workings repeatedly. With the exception that the three-phase output shift register on the U phase side is used,
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