
1-115
Under
development
Specifications in this manual are tentative and subject to change
Rev. H
Clock Synchronous Serial I/O Mode
MITSUBISHI MICROCOMPUTERS
M30222 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Table 1.35. Specifications of clock synchronous serial I/O mode (2)
Fig. 1.87. UARTi transmit/receive mode register in clock synchronous serial I/O mode
Item
Specification
Select function
CLK polarity selection
Whether transmit data is output/input at the rising edge or falling edge of the
transfer clock can be selected
LSB first/MSB first selection
Whether transmission/reception begins with bit 0 or bit 7 can be selected
Continuous receive mode selection
Reception is enabled simultaneously by a read from the receive buffer register
Transfer clock output from multiple pins selection (UART1) (Note)
UART1 transfer clock can be chosen by software to be output from one of
the two pins set
Switching serial data logic (UART2)
Whether to invert data in writing to the transmission buffer register or
reading the reception buffer register can be selected.
TxD, RxD I/O polarity reverse (UART2)
This function is inverting TxD port output and RxD port input. All I/O data
level are inverted, including start and stop bits.
Note: The transfer clock output from multple pins and the separate CTS/RTS pins functions cannot be selected simultaneously.
Separate CTS/RTS pins (UART0) (Note)
UART0 CTS and RTS pins each can be assigned to separate pins
Symbol
Address
When reset
UiMR(i=0,1)
03A016, 03A816
0016
CKDIR
UARTi transmit/receive mode registers
Internal/external clock
select bit
STPS
PRY
PRYE
SLEP
0 : Internal clock
1 : External clock (Note)
Bit name
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
0 (Must always be “0” in clock synchronous serial I/O mode)
01
0
SMD0
SMD1
SMD2
Serial I/O mode select bit
0 0 1 : Clock synchronous serial
I/O mode
b2 b1 b0
0
Invalid in clock synchronous serial I/O mode
Symbol
Address
When reset
U2MR
037816
0016
CKDIR
UART2 transmit/receive mode register
Internal/external clock
select bit
STPS
PRY
PRYE
IOPOL
0 : Internal clock
1 : External clock (Note 1)
Bit name
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
01
0
SMD0
SMD1
SMD2
Serial I/O mode select bit
0 0 1 : Clock synchronous serial
I/O mode
b2 b1 b0
0
Invalid in clock synchronous serial I/O mode
TxD, RxD I/O polarity
reverse bit (Note)
0 : No reverse (Note 2)
1 : Reverse
Note: Set the corresponding port direction register to "0".
Note 1: Set the corresponding port direction register to "0".
Note 2: Usually set to "0".