參數(shù)資料
型號: M29W640GB70ZA6F
廠商: STMICROELECTRONICS
元件分類: PROM
英文描述: 4M X 16 FLASH 3V PROM, 70 ns, PBGA48
封裝: 6 X 8 MM, 0.80 MM PITCH, ROHS COMPLIANT, TFBGA-48
文件頁數(shù): 7/90頁
文件大?。?/td> 849K
代理商: M29W640GB70ZA6F
M29W640GH, M29W640GL, M29W640GT, M29W640GB
Signal descriptions
15/90
2.7
Write Enable (W)
The Write Enable, W, controls the Bus Write operation of the memory’s Command Interface.
2.8
VPP/Write Protect (VPP/WP)
The VPP/Write Protect pin provides two functions. The VPP function allows the memory to
use an external high voltage power supply to reduce the time required for Unlock Bypass
Program operations. The Write Protect performs hardware protection:
It protects the first and last block on M29W640GH and M29W640GL devices.
It protects the first two and the last two boot blocks on M29W640GT and M29W640GB
devices.
The VPP/Write Protect pin may be left floating or unconnected (see Table 17: DC
When VPP/Write Protect is Low, VIL, the two outermost (M29W640GH and M29W640GL) or
four outermost blocks (M29W640GT and M29W640GB) are protected. Program and Erase
operations in this block are ignored while VPP/Write Protect is Low, even when RP is at VID.
When VPP/Write Protect is High, VIH, the memory reverts to the previous protection status
of the outermost blocks. Program and Erase operations can now modify the data in the
outermost blocks unless the block is protected using Block Protection.
Applying 12V to the VPP/WP pin will temporarily unprotect any block previously protected
(including the outermost blocks) using a High Voltage Block Protection technique (In-
System or Programmer technique). See Table 6: Hardware Protection for details.
When VPP/Write Protect is raised to VPP the memory automatically enters the Unlock
Bypass mode. When VPP/Write Protect returns to VIH or VIL normal operation resumes.
During Unlock Bypass Program operations the memory draws IPP from the pin to supply the
programming circuits. See the description of the Unlock Bypass command in the Command
Interface section. The transitions from VIH to VPP and from VPP to VIH must be slower than
Never raise VPP/Write Protect to VPP from any mode except Read mode, otherwise the
memory may be left in an indeterminate state.
A 0.1F capacitor should be connected between the VPP/Write Protect pin and the VSS
Ground pin to decouple the current surges from the power supply. The PCB track widths
must be sufficient to carry the currents required during Unlock Bypass Program, IPP.
Table 6.
Hardware Protection
VPP/WP
RP
Function
VIL
VIH
M29W640GT and
M29W640GB
4 outermost parameter blocks protected from
Program/Erase operations
M29W640GH and
M29W640GL
2 outermost blocks protected from Program/Erase
operations
VID
M29W640GT and
M29W640GB
All blocks temporarily unprotected except the 4 outermost
blocks
M29W640GH and
M29W640GL
All blocks temporarily unprotected except the 2 outermost
blocks
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