參數(shù)資料
型號: M29W640GB70ZA6F
廠商: STMICROELECTRONICS
元件分類: PROM
英文描述: 4M X 16 FLASH 3V PROM, 70 ns, PBGA48
封裝: 6 X 8 MM, 0.80 MM PITCH, ROHS COMPLIANT, TFBGA-48
文件頁數(shù): 17/90頁
文件大?。?/td> 849K
代理商: M29W640GB70ZA6F
Command Interface
M29W640GH, M29W640GL, M29W640GT, M29W640GB
4.1.3
Read CFI Query command
The Read CFI Query Command is used to read data from the Common Flash Interface
(CFI) Memory Area. This command is valid when the device is in the Read Array mode, or
when the device is in Autoselected mode.
One Bus Write cycle is required to issue the Read CFI Query Command. Once the
command is issued subsequent Bus Read operations read from the Common Flash
Interface Memory Area.
The Read/Reset command must be issued to return the device to the previous mode (the
Read Array mode or Autoselected mode). A second Read/Reset command would be
needed if the device is to be put in the Read Array mode from Autoselected mode.
on the information contained in the Common Flash Interface (CFI) memory area.
4.1.4
Chip Erase command
The Chip Erase command can be used to erase the entire chip. Six Bus Write operations
are required to issue the Chip Erase Command and start the Program/Erase Controller.
If any blocks are protected then these are ignored and all the other blocks are erased. If all
of the blocks are protected the Chip Erase operation appears to start but will terminate
within about 100s, leaving the data unchanged. No error condition is given when protected
blocks are ignored.
During the erase operation the memory will ignore all commands, including the Erase
Suspend command. It is not possible to issue any command to abort the operation. Typical
chip erase times are given in Table 12: Program, Erase times and endurance cycles. All Bus
Read operations during the Chip Erase operation will output the Status Register on the Data
Inputs/Outputs. See the section on the Status Register for more details.
After the Chip Erase operation has completed the memory will return to the Read Mode,
unless an error has occurred. When an error occurs the memory will continue to output the
Status Register. A Read/Reset command must be issued to reset the error condition and
return to Read Mode.
The Chip Erase Command sets all of the bits in unprotected blocks of the memory to ’1’. All
previous data is lost.
Refer to Figure 8: Chip/Block Erase waveforms (8-bit mode) for a description of Chip Erase
ac waveforms.
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相關代理商/技術(shù)參數(shù)
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