參數(shù)資料
型號： M29W640GB70ZA6F
廠商： STMICROELECTRONICS
元件分類： PROM
英文描述： 4M X 16 FLASH 3V PROM, 70 ns, PBGA48
封裝： 6 X 8 MM, 0.80 MM PITCH, ROHS COMPLIANT, TFBGA-48
文件頁數(shù)： 36/90頁
文件大?。?/td> 849K
代理商： M29W640GB70ZA6F
M29W640GH, M29W640GL, M29W640GT, M29W640GB
Status Register
41/90
5.3
Error Bit (DQ5)
The Error Bit can be used to identify errors detected by the Program/Erase Controller. The
Error Bit is set to ’1’ when a Program, Block Erase or Chip Erase operation fails to write the
correct data to the memory. If the Error Bit is set a Read/Reset command must be issued
before other commands are issued. The Error bit is output on DQ5 when the Status Register
is read.
Note that the Program command cannot change a bit set to ’0’ back to ’1’ and attempting to
do so will set DQ5 to ‘1’. A Bus Read operation to that address will show the bit is still ‘0’.
One of the Erase commands must be used to set all the bits in a block or in the whole
memory from ’0’ to ’1’.
5.4
Erase Timer Bit (DQ3)
The Erase Timer Bit can be used to identify the start of Program/Erase Controller operation
during a Block Erase command. Once the Program/Erase Controller starts erasing the
Erase Timer Bit is set to ’1’. Before the Program/Erase Controller starts the Erase Timer Bit
is set to ’0’ and additional blocks to be erased may be written to the Command Interface.
The Erase Timer Bit is output on DQ3 when the Status Register is read.
5.5
Alternative Toggle Bit (DQ2)
The Alternative Toggle Bit can be used to monitor the Program/Erase controller during
Erase operations. The Alternative Toggle Bit is output on DQ2 when the Status Register is
read.
During Chip Erase and Block Erase operations the Toggle Bit changes from ’0’ to ’1’ to ’0’,
etc., with successive Bus Read operations from addresses within the blocks being erased. A
protected block is treated the same as a block not being erased. Once the operation
completes the memory returns to Read mode.
During Erase Suspend the Alternative Toggle Bit changes from ’0’ to ’1’ to ’0’, etc. with
successive Bus Read operations from addresses within the blocks being erased. Bus Read
operations to addresses within blocks not being erased will output the memory cell data as if
in Read mode.
After an Erase operation that causes the Error Bit to be set the Alternative Toggle Bit can be
used to identify which block or blocks have caused the error. The Alternative Toggle Bit
changes from ’0’ to ’1’ to ’0’, etc. with successive Bus Read Operations from addresses
within blocks that have not erased correctly. The Alternative Toggle Bit does not change if
the addressed block has erased correctly.
description of the data polling operation and timings.
5.6
Write to Buffer and Program Abort Bit (DQ1)
The Write to Buffer and Program Abort bit, DQ1, is set to ‘1’ when a Write to Buffer and
Program operation aborts. Otherwise, DQ1 bit is set to ‘0’. The Write to Buffer and Program
Abort and Reset command must be issued to return the device to Read mode (see Write to
Buffer and Program in COMMANDS section).
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M29W640GB70ZF3F 制造商:Micron Technology Inc 功能描述:AUTOMOTIVE - Tape and Reel
M29W640GB70ZF3F TR 制造商:Micron Technology Inc 功能描述:IC FLASH 64MBIT 70NS 64TBGA
M29W640GB70ZF6E 功能描述:IC FLASH 64MBIT 70NS 64TBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:Axcell™ 標準包裝:2,000 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 異步 存儲容量:256K (32K x 8) 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:28-TSSOP（0.465"，11.8mm 寬） 供應(yīng)商設(shè)備封裝:28-TSOP 包裝:帶卷 (TR) 其它名稱:71V256SA15PZGI8
M29W640GB70ZS6E 制造商:Micron Technology Inc 功能描述:PARALLEL NOR - Trays 制造商:Micron Technology Inc 功能描述:64MBIT PARALLEL NOR FLASH 制造商:Micron Technology Inc 功能描述:IC FLASH 64MBIT 70NS 64FBGA
M29W640GB70ZS6F 制造商:Micron Technology Inc 功能描述:PARALLEL NOR - Tape and Reel
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