參數(shù)資料
型號: M29W640GB70ZA6F
廠商: STMICROELECTRONICS
元件分類: PROM
英文描述: 4M X 16 FLASH 3V PROM, 70 ns, PBGA48
封裝: 6 X 8 MM, 0.80 MM PITCH, ROHS COMPLIANT, TFBGA-48
文件頁數(shù): 22/90頁
文件大?。?/td> 849K
代理商: M29W640GB70ZA6F
M29W640GH, M29W640GL, M29W640GT, M29W640GB
Command Interface
29/90
4.2.3
Octuple Byte Program command
This is used to write eight adjacent bytes, in x8 mode, simultaneously. The addresses of the
eight bytes must differ only in A1, A0 and DQ15A-1.
12V must be applied to the VPP/Write Protect pin, VPP/WP, prior to issuing an Octuple Byte
Program command. Care must be taken because applying a 12V voltage to the VPP/WP pin
will temporarily unprotect any protected block.
Nine bus write cycles are necessary to issue the command:
1.
The first bus cycle sets up the command.
2.
The second bus cycle latches the Address and the Data of the first byte to be written.
3.
The third bus cycle latches the Address and the Data of the second byte to be written.
4.
The fourth bus cycle latches the Address and the Data of the third byte to be written.
5.
The fifth bus cycle latches the Address and the Data of the fourth byte to be written.
6.
The sixth bus cycle latches the Address and the Data of the fifth byte to be written.
7.
The seventh bus cycle latches the Address and the Data of the sixth byte to be written.
8.
The eighth bus cycle latches the Address and the Data of the seventh byte to be
written.
9.
The ninth bus cycle latches the Address and the Data of the eighth byte to be written
and starts the Program/Erase Controller.
4.2.4
Double Word Program command
The Double Word Program command is used to write a page of two adjacent words in
parallel. The two words must differ only for the address A0.
Three bus write cycles are necessary to issue the Double Word Program command.
The first bus cycle sets up the Double Word Program Command.
The second bus cycle latches the Address and the Data of the first word to be written.
The third bus cycle latches the Address and the Data of the second word to be written
and starts the Program/Erase Controller.
After the program operation has completed the memory will return to the Read mode, unless
an error has occurred. When an error occurs Bus Read operations will continue to output
the Status Register. A Read/Reset command must be issued to reset the error condition and
return to Read mode.
Note that the Fast Program commands cannot change a bit set at ’0’ back to ’1’. One of the
Erase Commands must be used to set all the bits in a block or in the whole memory from ’0’
to ’1’.
Typical Program times are given in Table 12: Program, Erase times and endurance cycles.
Note:
It is not necessary to raise VPP/WP to 12V before issuing this command.
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