參數(shù)資料
型號: M12L128168A_06
廠商: Elite Semiconductor Memory Technology Inc.
英文描述: 2M x 16 Bit x 4 Banks Synchronous DRAM
中文描述: 200萬× 16位× 4個(gè)銀行同步DRAM
文件頁數(shù): 36/43頁
文件大?。?/td> 804K
代理商: M12L128168A_06
ESMT
M12L128168A
Elite Semiconductor Memory Technology Inc.
Revision
:
2.0
Publication Date
:
Oct. 2006
36/43
Clock Suspension & DQM Operation Cycle @ CAS Letency = 2 , Burst Length = 4
*Note : 1. DQM is needed to prevent bus contention
C L O C K
C K E
C S
R A S
C A S
A D D R
W E
DQ
DQ M
A10/AP
A13
A12
Ra
Ca
Cb
C c
Ra
Qa0
Qa1
Qa2
Qa3
t
S H Z
Qb1
Qb0
t
S H Z
Dc0
Dc2
*Not e 1
Row Active
Read
Clock
Suspension
Read
Read DQM
W rite
W rite
DQ M
Clock
Suspension
W rite
DQ M
:Don't Car e
0
1
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M12L128168A-5BIG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM
M12L128168A-5T 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM