參數(shù)資料
型號: M12L128168A_06
廠商: Elite Semiconductor Memory Technology Inc.
英文描述: 2M x 16 Bit x 4 Banks Synchronous DRAM
中文描述: 200萬× 16位× 4個銀行同步DRAM
文件頁數(shù): 34/43頁
文件大?。?/td> 804K
代理商: M12L128168A_06
ESMT
M12L128168A
Elite Semiconductor Memory Technology Inc.
Revision
:
2.0
Publication Date
:
Oct. 2006
34/43
Read & Write Cycle at Different Bank @ Burst Length = 4
*Note : 1. t
CDL
should be met to complete write.
C L O C K
C K E
C S
R A S
C A S
A D D R
W E
DQ
DQ M
A10/AP
A13
A12
CL = 2
CL = 3
Row Active
( A- Bank)
Read
(B- Ban k)
: D o n ' t C a r e
QAa1 QAa2 QAa3
Ddb1 DDb2 DDd3
DDb0
QAa0
RAa
CBc
RAa
CAa
QAa1 QAa2 QAa3
Ddb1 DDb2 DDd3
DDb0
QAa0
W rite
( D- Bank)
HIGH
RD b
CD b
RBc
RBb
RAc
QBc0 QBc1 QBc2
QBc0 QBc1
Read
(A- Bank)
Row Active
( D- Bank)
Precharge
( A- Bank)
Row Active
(B-Bank)
t
CD L
*Not e 1
1
9
2
10
3
4
5
6
7
8
11
12
13
14
17
15
18
16
19
0
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