參數(shù)資料
型號(hào): M12L128168A_06
廠商: Elite Semiconductor Memory Technology Inc.
英文描述: 2M x 16 Bit x 4 Banks Synchronous DRAM
中文描述: 200萬× 16位× 4個(gè)銀行同步DRAM
文件頁數(shù): 15/43頁
文件大?。?/td> 804K
代理商: M12L128168A_06
ESMT
Self refresh entry command
(CS ,RAS ,CAS , CKE = Low ,
WE
= High)
After the command execution, self refresh operation continues while CKE
remains low. When CKE goes to high, the M12L128168A exits the self refresh mode.
During self refresh mode, refresh interval and refresh operation are performed
internally, so there is no need for external control.
Before executing self refresh, all banks must be precharged.
Burst stop command
(CS ,
WE
= Low,RAS ,CAS = High)
This command terminates the current burst operation.
Burst stop is valid at every burst length.
No operation
(CS = Low ,RAS ,CAS ,
WE
= High)
This command is not a execution command. No operations begin or terminate by
this command.
M12L128168A
Elite Semiconductor Memory Technology Inc.
Revision
:
2.0
Publication Date
:
Oct. 2006
15/43
CLK
CKE
CS
RAS
WE
A12, A13
(Bank select)
A10
Add
CAS
CLK
CKE
CS
RAS
WE
A12, A13
(Bank select)
A10
Add
CAS
H
Fig. 7 Self refresh entry
command
Fig. 8 Burst stop command
CLK
CKE
CS
RAS
WE
A12, A13
(Bank select)
A10
Add
CAS
H
Fig. 9 No operation
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