參數(shù)資料
型號: LXT350PE
英文描述: PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|LDCC|28PIN|PLASTIC
中文描述: 的PCM收發(fā)器|單|優(yōu)稅PCM-30/E-1 |的CMOS | LDCC | 28腳|塑料
文件頁數(shù): 32/50頁
文件大小: 1197K
代理商: LXT350PE
LXT350
T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation
32
Datasheet
5
DFMO
1 = Driver Failure Monitor Open detected.
0 = Driver Failure Monitor Open not detected.
6
BIST
1 = Built-In Self Test passed.
0 = Built-In Self Test did not pass (or was not run).
7
-
Reserved. Ignore.
Table 16. Control Register #4
Read/Write,
Address (A7-A0) = x010111x
Bit
Name
Function
0
CODEV
1 = Enable detection of HDB3 code violations at the BPV pin along with bipolar violations and Zero
Substitution Violations (if enabled).
0 = Disable detection of HDB3 code violations
1
ZEROV
1 = Enable detection of HDB3 Zero Substitution Violations (four consecutive zeros). Note that Zero
Substitution Violations are reported at the BPV pin.
0 = Disable detection of HDB3 Zero Substitution Violations.
2
LOS2048
1 = Set LOS detection threshold to 2048 consecutive zeros.
0 = Set LOS detection threshold to 32 consecutive zeros (for E1 operation) or to 175 consecutive
zeros (for T1 operation).
3
COL32CM
1 = Set LOS clear condition criterion to receipt of 32 consecutive marks (E1 operation).
0 = Set LOS clear condition criterion to 12.5% mark density (E1 operation).
4
-
Reserved. Set to 0 for normal operation, ignore when reading
5
-
Reserved. Set to 0 for normal operation, ignore when reading
6
-
Reserved. Set to 0 for normal operation, ignore when reading
7
-
Reserved. Set to 0 for normal operation, ignore when reading
Table 15. Performance Status Register
Read Only, Address (A7-A0) = x010101x
Bit
Name
Function
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