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參數(shù)資料
| 型號(hào)： | LXT350PE |
| 英文描述： | PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|LDCC|28PIN|PLASTIC |
| 中文描述： | 的PCM收發(fā)器|單|優(yōu)稅PCM-30/E-1 |的CMOS | LDCC | 28腳|塑料 |
| 文件頁數(shù)： | 19/50頁 |
| 文件大小： | 1197K |
| 代理商： | LXT350PE |
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T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation
—
LXT350
Datasheet
19
.
2.7
Diagnostic Mode Operation
The LXT350 offers multiple diagnostic modes as listed in
Table 6
. Note that various diagnostic
modes are only available in Host mode. In Hardware mode, the diagnostic modes are selected by a
combination of pin settings. In Host mode, the diagnostic modes are selected by writing
appropriate register bits. The following paragraphs provide details of the diagnostic modes.
Table 5. Control and Operational Mode Selection
Input to Pin
1
Mode of Operation
Mode
TRSTE
Hardware
Host
2
Unipolar
Bipolar
AMI Enc/Dec
B8ZS/HDB3
Encoder/Decoder
All Outputs Tristated
Low
Low
On
Off
Off
On
Off
3
Off
No
Low
High
On
Off
Off
On
Off
3
Off
Yes
Low
Open
On
Off
On
Off
On
Off
No
High
Low
Off
On
x
x
x
x
No
High
High
Off
On
x
x
x
x
Yes
High
Open
Off
On
x
x
x
x
No
Open
Low
On
Off
On
Off
Off
On
No
Open
High
On
Off
On
Off
Off
On
Yes
Open
Open
On
Off
On
Off
Off
On
No
1. Open is either a midrange voltage or the pin is floating.
2. In Host mode, the contents of register CR1 determine the operation mode.
3. Encoding is done externally.
Table 6. Diagnostic Mode Availability
Diagnostic Mode
Availability
1
Host Mode
Maskable
2
Hardware
Host
Loopback Modes
Local Loopback (LLOOP)
Yes
Yes
No
Analog Loopback (ALOOP)
Yes
Yes
No
Remote Loopback (RLOOP)
Yes
Yes
No
Dual Loopback (DLOOP)
Yes
Yes
No
Internal Data Pattern Generation
Transmit All Ones (TAOS)
Yes
Yes
No
Quasi-Random Signal Source (QRSS)
Yes
Yes
Yes
Error Insertion and Detection
Bipolar Violation Insertion (INSBPV)
Yes
Yes
No
Logic Error Insertion (INSLER)
Yes
Yes
No
1. In Hardware mode, a combination of pin settings selects the Diagnostics Modes. In Host mode, writing appropriate bits in the
Control Registers selects the Diagnostic Modes.
2. Host mode allows interrupt masking by writing a
“
1
”
to the corresponding bit in the Interrupt Clear Register.
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