參數(shù)資料
型號： LXT350PE
英文描述： PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|LDCC|28PIN|PLASTIC
中文描述： 的PCM收發(fā)器|單|優(yōu)稅PCM-30/E-1 |的CMOS | LDCC | 28腳|塑料
文件頁數(shù)： 25/50頁
文件大?。?/td> 1197K
代理商： LXT350PE
T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation
—
LXT350
Datasheet
25
2.7.3
Error Insertion and Detection
2.7.3.1
Bipolar Violation Insertion
(INSBPV)
The INSBPV function is available in Unipolar mode. Sampling occurs on the falling edge of
TCLK. A Low-to-High transition on the INSBPV pin inserts a BPV on the next available mark,
except in the four following situations:
When zero suppression (B8ZS) is not violated
When LLOOP and TAOS are both active. In this case, the BPV is looped back to the BPV pin
and the line driver transmits all ones with no violation.
When RLOOP is active
Note that when the LXT350 is configured to transmit internally generated data patterns, a BPV can
be inserted on the transmit pattern regardless of whether the device is in the Unipolar or Bipolar
mode of operation.
2.7.3.2
Logic Error Insertion
(INSLER)
When transmission of QRSS is active, a logic error is inserted into the transmit data pattern when a
Low-to-High transition occurs on the INSLER pin. Note that in QRSS mode, logic error insertion
is inhibited on a jammed bit (i.e. a bit forced to one to suppress transmission of more than 14
consecutive zeros).
The transceiver treats data patterns the same way it treats data applied to TPOS/TNEG. Therefore,
the inserted logic error will follow the data flow path as defined by the active loopback mode
2.7.3.3
Logic Error Detection
(QPD)
After pattern synchronization is detected in QRSS mode, subsequent logic errors are reported on
the QPD pin. If a logic error occurs, the QPD pin goes High for half an RCLK cycle. Note that in
Host mode, the precise relationship between QPD and RCLK depends on the value of the CLKE
pin. When CLKE is Low, QPD goes High while RCLK is High; when CLKE is High, QPD goes
High while RCLK is Low. To tally logic errors, connect an error counter to QPD. A continuous
High on this pin indicates loss of either the QRSS pattern lock or a LOS condition.
“
Quasi-Random
Signal Source (QRSS)
”
on page 23
provides additional details on QRSS pattern lock criteria.
2.7.3.4
Bipolar Violation Detection
(BPV)
When the internal encoders/decoders are disabled or when configured in Unipolar mode, bipolar
violations are reported at the BPV pin. BPV goes High for a full clock cycle to indicate receipt of a
BPV. When the encoders/decoders are enabled, the LXT350 does not report bipolar violations due
to the line coding scheme.
2.7.3.5
HDB3 Code Violation Detection
(CODEV)
An HDB3 code violation (CODEV) occurs when two consecutive bipolar violations of the same
polarity are received (refer to ITU O.161). When CODEV detection is enabled, the BPV pin goes
High for a full RCLK cycle to report a CODEV violation. Note that bipolar violations and zero
substitution violations will also be reported on the BPV pin if these options are enabled.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LXT350QE 制造商:LEVEL1 功能描述:
LXT351 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation
LXT351PE 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|LDCC|28PIN|PLASTIC
LXT351QE 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|QFP|44PIN|PLASTIC
LXT360 制造商:LVL1 制造商全稱:LVL1 功能描述:Integrated T1/E1 LH/SH Transceivers for DS1/DSX-1/CSU or NTU/ISDN PRI Applications
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