參數(shù)資料
型號(hào): LSIFC919
英文描述: LSIFC919 Single Channel Fibre Channel I/O Processor technical manual v2.0 10/01
中文描述: LSIFC919單通道光纖通道I / O處理器技術(shù)手冊(cè)2.0 10/01
文件頁數(shù): 82/144頁
文件大?。?/td> 1496K
代理商: LSIFC919
5-26
Registers
Register: 0x08
Host Diagnostic
Read/Write
The
Host Diagnostic
register contains low level diagnostic controls and
status information.
R
Reserved (Read Only)
Reserved for future use.
[31:8]
DWE
Diagnostic Write Enable (Read Only)
This bit, when set to 1, indicates that write access to the
Host Diagnostic
register may occur. This bit is set as a
result of writing the correct key sequence into the
Write
Sequence
register.
7
FBS
Flash Bad Signature (Read Only)
This bit, when set to 1, indicates that the IOP ARM has
attempted to boot from Flash ROM but encountered a
bad Flash signature. When this occurs, the DisARM bit in
this register is set to 1 (holding the IOP ARM reset) until
both the FlashBadSignature and DisARM conditions are
cleared by the host.
6
R
Reserved (Read Only)
Reserved for future use.
[5:4]
TTLI
TTL Interrupt (Read/Write)
This bit configures the PCI INTA/ pin as either open drain
or TTL. This bit defaults to 0 (open drain) on reset and
should only be set to 1 when the device is being tested
on a tester.
3
31
16
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
8
7
6
5
4
3
2
1
0
R
DWE
FBS
R
TTLI
RA
DisARM DME
0
0
0
0
0
0
0
0
0
0
0
0
0
0
x
0
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