參數(shù)資料
型號: LSIFC919
英文描述: LSIFC919 Single Channel Fibre Channel I/O Processor technical manual v2.0 10/01
中文描述: LSIFC919單通道光纖通道I / O處理器技術手冊2.0 10/01
文件頁數(shù): 126/144頁
文件大小: 1496K
代理商: LSIFC919
C-2
Glossary of Terms and Abbreviations
Configuration
Refers to the way a computer is setup; the combined hardware
components (computer, monitor, keyboard, and peripheral devices) that
make up a computer system; or the software settings that allow the
hardware components to communicate with each other.
CPU
Central Processing Unit. The “brain” of the computer that performs the
actual computations. The term Microprocessor Unit (MPU) is also used.
Crosspoint-
switched
topology
(FC-XS)
Highest performance FC fabric, providing a choice of multiple path
routings between pairs of F_Ports.
Device Driver
A program that allows a microprocessor (through the operating system)
to direct the operation of a peripheral device.
DMA
Direct Memory Access. A method of moving data from a storage device
directly to RAM, without using the CPU’s resources.
DMA Bus
Master
A feature that allows a peripheral to control the flow of data to and from
system memory by blocks, as opposed to PIO (Programmed I/O) where
the processor is in control and the flow is by byte.
EEPROM
Electronically Erasable Programmable Read Only Memory. A memory
chip typically used to store configuration information.
EISA
Extended Industry Standard Architecture. An extension of the 16-bit ISA
bus standard. It allows devices to perform 32-bit data transfers.
Exchange
A term that refers to one of the FC “building blocks”, composed of one
or more nonconcurrent sequences for a single operation.
Fabric
FC defined interconnection methodology that handles routing in FC
networks.
FC-0
Lowest level of the FC Physical standard, covering the physical
characteristics of the interface and media.
FC-1
Middle level of the FC-PH standard, defining the 8B/10B
encoding/decoding and transmission protocol.
FC-2
Highest level of FC-PH, defining the rules for signaling protocol and
describing transfer of the frame, sequence, and exchanges.
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