參數(shù)資料
型號(hào): LR38666Y
廠商: Sharp Corporation
元件分類: 數(shù)字信號(hào)處理
英文描述: CMOS digital signal processor
中文描述: CMOS數(shù)字信號(hào)處理器
文件頁(yè)數(shù): 30/38頁(yè)
文件大?。?/td> 203K
代理商: LR38666Y
30
LR38666Y
(DV
DD
= 3.3 V, DV
DD2
= 2.5 V, T
A
= 0 to +70C)
PARAMETER
SYMBOL
CONDITIONS
UNIT
NOTE
MIN.
MAX.
Output setup period of MEMA [20 : 15] & CFA at
reading (relative to the falling edge of CFCE1Z/2Z)
Output setup period of MEMA [20 : 15] & CFA at
writing (relative to the falling edge of CFCE1Z/2Z)
Output hold period of MEMA [20 : 15] & CFA at
reading (relative to the rising edge of CFCE1Z/2Z)
Output hold period of MEMA [20 : 15] & CFA at writing
(relative to the rising edge of CFCE1Z/2Z)
Minimum "High" period of CFCE1Z/2Z
"High" hold period of FL_EXOEZ
(relative to the falling edge of CFCE1Z/2Z)
"Low" hold period of CFCE1Z/2Z
(relative to the rising edge of FL_EXOEZ)
"High" hold period of FL_EXWEZ
(relative to the falling edge of CFCE1Z/2Z)
"Low" hold period of CFCE1Z/2Z
(relative to the rising edge of FL_EXWEZ)
Input setup period of CFD
(relative to the rising edge of CFWAITZ)
Input hold period of CFD
(relative to the rising edge of FL_EXOEZ)
T
MASR
T
MCLK
– 5
ns
2
T
MASW
T
MCLK
– 5
ns
2
T
MAHR
2T
MCLK
– 5
ns
2
T
MAHW
T
MCLK
– 5
ns
2
T
MCC
3T
MCLK
– 5
ns
1
T
EOEHH
T
MCLK
– 5 T
MCLK
+ 5
ns
1
T
EOCSLH
2T
MCLK
– 5 2T
MCLK
+ 5
ns
1
T
EWEHH
T
MCLK
– 5 T
MCLK
+ 5
ns
1
T
EWCSLH
2T
MCLK
– 5 2T
MCLK
+ 5
ns
1
T
MDIS
0
ns
NOTES :
1. Output load capacity C
L
= 50 pF
2. MEMA [20 : 15] output load capacity C
L
= 50 pF, CFA [4 : 0] output load capacity C
L
= 30 pF.
1
ns
5T
MCLK
+ 5
5T
MCLK
– 5
T
MDOH
Output hold period of CFD
(relative to the rising edge of CFCE1Z/2Z)
Determination period of CFWAITZ
(relative to the falling edge of FL_EXOEZ/FL_EXWEZ)
1
ns
2T
MCLK
+ 5
2T
MCLK
– 5
T
MDOA
Output delay period of CFD
(relative to MEMA [20 : 15] & CFA)
ns
0
T
MDIH
Hold period of CFWAITZ
(relative to the rising edge of EXDACK0Z/1Z)
T
MACKH
0
ns
Rising period of FL_EXWEZ
(relative to the rising edge of CFWAITZ)
T
MACKCW
4T
MCLK
– 5 5T
MCLK
+ 5
ns
1
Rising period of FL_EXOEZ
(relative to the rising edge of CFWAITZ)
T
MACKCR
2T
MCLK
– 5 3T
MCLK
+ 5
ns
1
T
MCACK
2T
MCLK
+ 5
ns
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