參數(shù)資料
型號(hào): LH28F800SG-L10
廠商: Sharp Corporation
英文描述: 8 M-bit (512 kB x 16) SmartVoltage Flash Memories
中文描述: 8 M位(512 KB的× 16)SmartVoltage閃存
文件頁(yè)數(shù): 4/45頁(yè)
文件大?。?/td> 328K
代理商: LH28F800SG-L10
LH28F800SG-L/SGH-L (FOR TSOP, CSP)
- 4 -
PIN DESCRIPTION
SYMBOL
TYPE
NAME AND FUNCTION
A
0
-A
18
INPUT
ADDRESS INPUTS :
Inputs for addresses during read and write operations. Addresses
are internally latched during a write cycle.
DATA INPUT/OUTPUTS :
Inputs data and commands during CUI write cycles; outputs
data during memory array, status register, and identifier code read cycles. Data pins
float to high-impedance when the chip is deselected or outputs are disabled. Data is
internally latched during a write cycle.
CHIP ENABLE :
Activates the device's control logic, input buffers, decoders, and sense
amplifiers. CE#-high deselects the device and reduces power consumption to standby
levels.
RESET/DEEP POWER-DOWN :
Puts the device in deep power-down mode and resets
internal automation. RP#-high enables normal operation. When driven low, RP# inhibits
write operations which provide data protection during power transitions. Exit from deep
power-down sets the device to read array mode.
RP# at V
HH
allows to set permanent lock-bit. Block erase, word write, or lock-bit
configuration with V
IH
< RP# < V
HH
produce spurious results and should not be
attempted.
OUTPUT ENABLE :
Controls the device's outputs during a read cycle.
WRITE ENABLE :
Controls writes to the CUI and array blocks. Addresses and data are
latched on the rising edge of the WE# pulse.
WRITE PROTECT :
Master control for block locking. When V
IL
, locked blocks cannot be
erased and programmed, and block lock-bits can not be set and reset.
READY/BUSY :
Indicates the status of the internal WSM. When low, the WSM is
performing an internal operation (block erase, word write, or lock-bit configuration).
RY/BY#-high indicates that the WSM is ready for new commands, block erase is
suspended, and word write is inactive, word write is suspended, or the device is in deep
power-down mode. RY/BY# is always active and does not float when the chip is
deselected or data outputs are disabled.
BLOCK ERASE, WORD WRITE, LOCK-BIT CONFIGURATION POWER SUPPLY :
For erasing array blocks, writing words, or configuring lock-bits. With V
PP
V
PPLK
,
memory contents cannot be altered. Block erase, word write, and lock-bit configuration
with an invalid V
PP
(see
Section 6.2.3 "DC CHARACTERISTICS"
) produce spurious
results and should not be attempted.
DEVICE POWER SUPPLY :
Internal detection configured the device for 2.7 V, 3.3 V or
5 V operation. To switch from one voltage to another, ramp V
CC
down to GND and then
ramp V
CC
to the new voltage. Do not float any power pins. With V
CC
V
LKO
, all write
attempts to the flash memory are inhibited. Device operations at invalid V
CC
voltage
(see
Section 6.2.3 "DC CHARACTERISTICS"
) produce spurious results and should
not be attempted.
GROUND :
Do not float any ground pins.
NO CONNECT :
Lead is not internal connected; recommend to be floated.
CE#
INPUT
OE#
INPUT
WE#
INPUT
WP#
INPUT
GND
NC
SUPPLY
DQ
0
-DQ
15
INPUT/
OUTPUT
RP#
INPUT
RY/BY#
OUTPUT
V
PP
SUPPLY
V
CC
SUPPLY
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