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參數(shù)資料
| 型號： | LH28F800SG-L10 |
| 廠商： | Sharp Corporation |
| 英文描述： | 8 M-bit (512 kB x 16) SmartVoltage Flash Memories |
| 中文描述： | 8 M位（512 KB的× 16）SmartVoltage閃存 |
| 文件頁數(shù)： | 11/45頁 |
| 文件大小： | 328K |
| 代理商： | LH28F800SG-L10 |
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COMMAND
BUS CYCLESNOTE
REQ
’
D.
1
≥
2
2
1
2
2
FIRST BUS CYCLE
Oper
(NOTE 1)
Addr
(NOTE 2)
Data
(NOTE 3)
Oper
(NOTE 1)
Addr
(NOTE 2)
Data
(NOTE 3)
Write
X
FFH
Write
X
90H
Write
X
70H
Write
X
50H
Write
BA
20H
Write
WA
40H or 10H
SECOND BUS CYCLE
Read Array/Reset
Read Identifier Codes
Read Status Register
Clear Status Register
Block Erase
Word Write
Block Erase and
Word Write Suspend
Block Erase and
Word Write Resume
Set Block Lock-Bit
Set Permanent Lock-Bit
Clear Block Lock-Bits
NOTES :
1.
Bus operations are defined in
Table 2
.
2.
X = Any valid address within the device.
IA = Identifier code address : see
Fig. 2
.
BA = Address within the block being erased or locked.
WA = Address of memory location to be written.
3.
SRD = Data read from status register. See
Table 6
for a
description of the status register bits.
WD = Data to be written at location WA. Data is latched
on the rising edge of WE# or CE# (whichever
goes high first).
ID = Data read from identifier codes.
4.
Following the Read Identifier Codes command, read
operations access manufacture, device, block lock, and
permanent lock codes. See
Section 4.2
for read
identifier code data.
5.
If the block is locked and the permanent lock-bit is not
set, WP# must be at V
IH
or RP# must be at V
HH
to
enable block erase or word write operations. Attempts to
issue a block erase or word write to a locked block while
WP# is V
IH
or RP# is V
HH
.
4
Read
Read
IA
X
ID
SRD
5
Write
Write
BA
WA
D0H
WD
5, 6
1
5
Write
X
B0H
1
5
Write
X
D0H
2
2
2
7
7
8
Write
Write
Write
BA
X
X
60H
60H
60H
Write
Write
Write
BA
X
X
01H
F1H
D0H
Table 3 Command Definitions
(NOTE 9)
6.
Either 40H or 10H is recognized by the WSM as the
word write setup.
If the permanent lock-bit is set, WP# must be at V
IH
or
RP# must be at V
HH
to set a block lock-bit. RP# must
be at V
HH
to set the permanent lock-bit. If the permanent
lock-bit is set, a block lock-bit cannot be set. Once the
permanent lock-bit is set, permanent lock-bit reset is
unable.
If the permanent lock-bit is set, clear block lock-bits
operation is unable. The clear block lock-bits operation
simultaneously clears all block lock-bits. If the permanent
lock-bit is not set, the Clear Block Lock-Bits command
can be done while WP# is V
IH
or RP# is V
HH
.
Commands other than those shown above are reserved
by SHARP for future device implementations and should
not be used.
7.
8.
9.
LH28F800SG-L/SGH-L (FOR TSOP, CSP)
- 11 -
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LH28F800SG-L70 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:8 M-bit (512 kB x 16) SmartVoltage Flash Memories |
| LH28F800SGN-L10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 Flash EEPROM |
| LH28F800SGN-L100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 Flash EEPROM |
| LH28F800SGN-L70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 Flash EEPROM |
| LH28F800SGR-L10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 Flash EEPROM |
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