參數(shù)資料
型號: ISP1761ET,518
廠商: ST-ERICSSON
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PBGA128
封裝: 9 X 9 MM, 0.80 MM HEIGHT, PLASTIC, MO-195, SOT857-1, TFBGA-128
文件頁數(shù): 19/164頁
文件大?。?/td> 767K
代理商: ISP1761ET,518
ISP1761_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 13 March 2008
114 of 163
NXP Semiconductors
ISP1761
Hi-Speed USB OTG controller
10.6.6 Endpoint MaxPacketSize register
This register determines the maximum packet size for all endpoints, except control 0. The
register contains 2 bytes, and the bit allocation is given in Table 119.
Each time the register is written, the Buffer Length register of the corresponding endpoint
is re-initialized to the FFOSZ eld value. NTRANS bits control the number of transactions
allowed in a single microframe for high-speed isochronous and interrupt endpoints only.
[1]
The reserved bits should always be written with the reset value.
The ISP1761 supports all the transfers given in Ref. 1 “Universal Serial Bus Specication
Each programmable FIFO can be independently congured using its Endpoint
MaxPacketSize register (R/W: 04h), but the total physical size of all enabled endpoints (IN
plus OUT), including set-up token buffer, control IN and control OUT, must not exceed
8192 bytes.
10.6.7 Endpoint Type register
This register sets the endpoint type of the indexed endpoint: isochronous, bulk or
interrupt. It also serves to enable the endpoint and congure it for double buffering.
Automatic generation of an empty packet for a zero-length TX buffer can be disabled using
bit NOEMPKT. The register contains 2 bytes. See Table 121.
Table 119. Endpoint MaxPacketSize register (address 0204h) bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
reserved[1]
NTRANS[1:0]
FFOSZ[10:8]
Reset
00000000
Bus reset
00000000
Access
R/W
Bit
7
6
5
4
3
2
1
0
Symbol
FFOSZ[7:0]
Reset
00000000
Bus reset
00000000
Access
R/W
Table 120. Endpoint MaxPacketSize register (address 0204h) bit description
Bit
Symbol
Description
15 to 13
-
reserved
12 to 11
NTRANS[1:0]
Number of Transactions: HS mode only.
00 — One packet per microframe
01 — Two packets per microframe
10 — Three packets per microframe
11 — reserved
These bits are applicable only for isochronous or interrupt
transactions.
10 to 0
FFOSZ[10:0]
FIFO Size: Sets the FIFO size, in bytes, for the indexed endpoint.
Applies to both high-speed and full-speed operations.
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