參數(shù)資料
型號(hào)： ISP1583ET1,118
廠(chǎng)商： ST-ERICSSON
元件分類(lèi)： 總線(xiàn)控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝： 4 X 4 MM, 0.80 MM HEIGHT, LEAD FREE, PLASTIC, SOT969-1,TFBGA-64
文件頁(yè)數(shù)： 34/100頁(yè)
文件大?。?/td> 508K
代理商： ISP1583ET1,118
ISP1583_7
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 22 September 2008
38 of 99
NXP Semiconductors
ISP1583
Hi-Speed USB peripheral controller
9.3 Data ow registers
9.3.1 Endpoint Index register (address: 2Ch)
The Endpoint Index register selects a target endpoint for register access by the
microcontroller. The register consists of 1 byte, and the bit allocation is shown in Table 34.
The following registers are indexed:
Buffer length
Buffer status
Control function
Data port
Endpoint MaxPacketSize
Endpoint type
For example, to access the OUT data buffer of endpoint 1 using the Data Port register, the
Endpoint Index register must rst be written with 02h.
Remark: The Endpoint Index register and the DMA Endpoint register must not point to the
same endpoint, irrespective of IN and OUT.
Remark: The delay time from the Write Endpoint Index register to the Read Data Port
register must be at least 190 ns.
Remark: The delay time from the Write Endpoint Index register to the Write Data Port
register must be at least 100 ns.
7
IEVBUS
Logic 1 enables interrupt for VBUS sensing.
6
IEDMA
Logic 1 enables interrupt on the DMA Interrupt Reason register change
detection.
5
IEHS_STA
Logic 1 enables interrupt on detecting a high-speed status change.
4
IERESM
Logic 1 enables interrupt on detecting a resume state.
3
IESUSP
Logic 1 enables interrupt on detecting a suspend state.
2
IEPSOF
Logic 1 enables interrupt on detecting a pseudo SOF.
1
IESOF
Logic 1 enables interrupt on detecting an SOF.
0
IEBRST
Logic 1 enables interrupt on detecting a bus reset.
Table 33.
Interrupt Enable register: bit description …continued
Bit
Symbol
Description
Table 34.
Endpoint Index register: bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
reserved
EP0SETUP
ENDPIDX[3:0]
DIR
Reset
-
10
0000
Bus reset
-
unchanged
0
0000
Access
-
R/W
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1583ET1-T 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB 2.0 SM FTPRINT RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
ISP1583ET1TM 制造商:STMicroelectronics 功能描述:
ISP1583ET2 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Hi-Speed USB peripheral controller
ISP1583ET2,518 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB 2.0 DEVICE RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
ISP1583ET2-T 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB 2.0 DEVICE RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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