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| 型號： | ISP1583ET1,118 |
| 廠商： | ST-ERICSSON |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PBGA64 |
| 封裝： | 4 X 4 MM, 0.80 MM HEIGHT, LEAD FREE, PLASTIC, SOT969-1,TFBGA-64 |
| 文件頁數(shù)： | 26/100頁 |
| 文件大?。?/td> | 508K |
| 代理商： | ISP1583ET1,118 |
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ISP1583_7
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 22 September 2008
30 of 99
NXP Semiconductors
ISP1583
Hi-Speed USB peripheral controller
9.1 Register access
Register access depends on the bus width used:
8-bit bus: multi-byte registers are accessed lower byte (LSByte) rst
16-bit bus: for single-byte registers, the upper byte (MSByte) must be ignored
Endpoint specic registers are indexed using the Endpoint Index register. The target
endpoint must be selected before accessing the following registers:
Task File 1F0
ATAPI peripheral
40h
single address word register: byte 0
(lower byte) is accessed rst
2
Task File 1F1
ATAPI peripheral
48h
IDE device access
1
Task File 1F2
ATAPI peripheral
49h
IDE device access
1
Task File 1F3
ATAPI peripheral
4Ah
IDE device access
1
Task File 1F4
ATAPI peripheral
4Bh
IDE device access
1
Task File 1F5
ATAPI peripheral
4Ch
IDE device access
1
Task File 1F6
ATAPI peripheral
4Dh
IDE device access
1
Task File 1F7
ATAPI peripheral
44h
IDE device access (write only; reading
returns FFh)
1
Task File 3F6
ATAPI peripheral
4Eh
IDE device access
1
Task File 3F7
ATAPI peripheral
4Fh
IDE device access
1
DMA Interrupt Reason
DMA controller
50h
shows reason (source) for DMA
interrupt
2
DMA Interrupt Enable
DMA controller
54h
enables DMA interrupt sources
2
DMA Endpoint
DMA controller
58h
selects endpoint FIFO, data ow
direction
1
DMA Strobe Timing
DMA controller
60h
strobe duration in MDMA mode
1
DMA Burst Counter
DMA controller
64h
DMA burst length
2
General registers
Interrupt
device
18h
shows interrupt sources
4
Chip ID
device
70h
product ID code and hardware version 3
Frame Number
device
74h
last successfully received
Start-Of-Frame: lower byte (byte 0) is
accessed rst
2
Scratch
device
78h
allows save or restore of rmware
status during suspend
2
Unlock Device
device
7Ch
re-enables register write access after
suspend
2
Test Mode
PHY
84h
direct setting of the DP and DM
states, internal transceiver test (PHY)
1
Table 21.
Register overview …continued
Name
Destination
Address Description
Size
(bytes)
Reference
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1583ET1-T | 功能描述:外圍驅動器與原件 - PCI USB 2.0 SM FTPRINT RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| ISP1583ET1TM | 制造商:STMicroelectronics 功能描述: |
| ISP1583ET2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hi-Speed USB peripheral controller |
| ISP1583ET2,518 | 功能描述:外圍驅動器與原件 - PCI USB 2.0 DEVICE RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| ISP1583ET2-T | 功能描述:外圍驅動器與原件 - PCI USB 2.0 DEVICE RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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