參數(shù)資料
型號(hào)： ISP1564ET,551
廠商： ST-ERICSSON
元件分類： 總線控制器
英文描述： PCI BUS CONTROLLER, PBGA100
封裝： 9 X 9 MM, 0.70 MM HEIGHT, 0.80 MM PITCH, PLASTIC, SOT926-1, TFBGA-100
文件頁(yè)數(shù)： 38/99頁(yè)
文件大?。?/td> 493K
代理商： ISP1564ET,551
ISP1564_2
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 13 November 2008
42 of 98
NXP Semiconductors
ISP1564
HS USB PCI host controller
[1]
The reserved bits must always be written with the reset value.
11.1.6 HcInterruptDisable register
Each disable bit in the HcInterruptDisable register corresponds to an associated interrupt
bit in the HcInterruptStatus register. The HcInterruptDisable register is coupled with the
HcInterruptEnable register. Therefore, writing logic 1 to a bit in this register clears the
corresponding bit in the HcInterruptEnable register, whereas writing logic 0 to a bit in this
register leaves the corresponding bit in the HcInterruptEnable register unchanged. On a
read, the current value of the HcInterruptEnable register is returned.
Bit
7
6
5
4
3
2
1
0
Symbol
reserved[1]
RHSC
FNO
UE
RD
SF
WDH
SO
Reset
00000000
Access
R/W
Table 58.
HcInterruptEnable - Host Controller Interrupt Enable register bit description
Address: Content of the base address register + 10h
Bit
Symbol
Description
31
MIE
Master Interrupt Enable:
0 — Ignore
1 — Enables interrupt generation by events specied in other bits of this register.
30
OC
Ownership Change:
0 — Ignore
1 — Enables interrupt generation because of ownership change.
29 to 7
reserved
-
6
RHSC
Root Hub Status Change:
0 — Ignore
1 — Enables interrupt generation because of root hub status change.
5
FNO
Frame Number Overow:
0 — Ignore
1 — Enables interrupt generation because of frame number overow.
4UE
Unrecoverable Error:
0 — Ignore
1 — Enables interrupt generation because of unrecoverable error.
3RD
Resume Detect:
0 — Ignore
1 — Enables interrupt generation because of resume detect.
2SF
Start-of-Frame:
0 — Ignore
1 — Enables interrupt generation because of Start-of-Frame.
1
WDH
HcDoneHead Write-back:
0 — Ignore
1 — Enables interrupt generation because of HcDoneHead write-back.
0SO
Scheduling Overrun:
0 — Ignore
1 — Enables interrupt generation because of scheduling overrun.
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ISP1564ET-T 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB 2.0 2PORT PCI HOST CONTROL RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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