參數(shù)資料
型號(hào)： ISP1564ET,551
廠(chǎng)商： ST-ERICSSON
元件分類(lèi)： 總線(xiàn)控制器
英文描述： PCI BUS CONTROLLER, PBGA100
封裝： 9 X 9 MM, 0.70 MM HEIGHT, 0.80 MM PITCH, PLASTIC, SOT926-1, TFBGA-100
文件頁(yè)數(shù)： 2/99頁(yè)
文件大?。?/td> 493K
代理商： ISP1564ET,551
ISP1564_2
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 13 November 2008
9 of 98
NXP Semiconductors
ISP1564
HS USB PCI host controller
[1]
Symbol names ending with # represent active LOW signals for PCI pins, for example: NAME#. Symbol names ending with underscore N
represent active LOW signals for USB pins, for example: NAME_N.
[2]
I = input; O = output; I/O = input/output; AI/O = analog input/output; AI = analog input; AO = analog output.
[3]
Connect to ground if I2C-bus is not used.
PWE1_N
79
D7
O
power enable for the USB downstream port 1
3.3 V output pad; 3 ns slew rate control; CMOS; open-drain
GND_RREF
80
A8
-
ground for external resistor on pin RREF
RREF
81
B8
AI/O
analog connection for the external resistor (11 k
± 1%)
GNDA
82
C7
-
analog ground
DM1
83
A7
AI/O
D
; analog connection for the USB downstream port 1; pull down to
ground through a 15 k
resistor, even when the port is not used
GNDA
84
B7
-
analog ground
DP1
85
A6
AI/O
D+; analog connection for the USB downstream port 1; pull down to
ground through a 15 k
resistor, even when the port is not used
VCCA(AUX)
86
B6
-
auxiliary analog supply voltage; see Section 7.8
OC2_N
87
E6
I
overcurrent sense input for the USB downstream port 2 (digital); when
not in use, connect this pin to 3.3 V
3.3 V input pad; CMOS
PWE2_N
88
D6
O
power enable for the USB downstream port 2
3.3 V output pad; 3 ns slew rate control; CMOS; open-drain
GNDA
89
C5
-
analog ground
DM2
90
A5
AI/O
D
; analog connection for the USB downstream port 2; pull down to
ground through a 15 k
resistor, even when the port is not used
GNDA
91
B5
-
analog ground
DP2
92
A4
AI/O
D+; analog connection for the USB downstream port 2; pull down to
ground through a 15 k
resistor, even when the port is not used
VCCA(AUX)
93
B4
-
auxiliary analog supply voltage; see Section 7.8
GND
94
B2
-
ground
GND
95
D5
-
ground
SCL
96
B3
I/O
I2C-bus clock; pull up to 3.3 V through a 10 k
resistor[3]
I2C-bus pad; clock signal
SDA
97
A3
I/O
I2C-bus data; pull up to 3.3 V through a 10 k
resistor[3]
I2C-bus pad; data signal
VCC(IO)AUX
98
A2
-
I/O pads auxiliary supply voltage; see Section 7.8
PME#
99
A1
O
PCI Power Management Event; used by a device to request a change in
the device or system power state
PCI pad; 3.3 V signaling; open-drain
VCC(IO)AUX
100
C4
-
I/O pads auxiliary supply voltage; see Section 7.8
Table 2.
Pin description …continued
Symbol[1]
Pin
Type[2]
Description
LQFP100
TFBGA100
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1564ETGA 功能描述:IC USB PCI HOST CTRLR 100-TFBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話(huà) 接口:I²C，2 線(xiàn)串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤(pán)（4x4） 包裝:帶卷 (TR) 安裝類(lèi)型:表面貼裝 產(chǎn)品目錄頁(yè)面:1015 (CN2011-ZH PDF) 其它名稱(chēng):296-25223-2
ISP1564ET-S 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB 2.0 2PORT PCI HOST CONTROL RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
ISP1564ET-T 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB 2.0 2PORT PCI HOST CONTROL RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
ISP1564ETUM 功能描述:IC USB PCI HOST CTRLR 100-TFBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話(huà) 接口:I²C，2 線(xiàn)串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤(pán)（4x4） 包裝:帶卷 (TR) 安裝類(lèi)型:表面貼裝 產(chǎn)品目錄頁(yè)面:1015 (CN2011-ZH PDF) 其它名稱(chēng):296-25223-2
ISP1564HL 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Hi-Speed USB PCI host controller
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