參數(shù)資料
型號(hào): IS45VS16160D-8BLA2
廠商: INTEGRATED SILICON SOLUTION INC
元件分類: DRAM
英文描述: 16M X 16 SYNCHRONOUS DRAM, 6 ns, PBGA54
封裝: 13 X 8 MM, 0.80 MM PITCH, LEAD FREE, MS-207, BGA-54
文件頁數(shù): 10/61頁
文件大?。?/td> 939K
代理商: IS45VS16160D-8BLA2
18
Integrated Silicon Solution, Inc. — www.issi.com
Rev. 00A
04/21/09
IS42VS83200D, IS42VS16160D
IS45VS83200D, IS45VS16160D
OPERATING FREQUENCY / LATENCY RELATIONSHIPS
SYMBOL PARAMETER
UNITS
ClockCycleTime
7.5
8
ns
OperatingFrequency
(CASLatency=3)
133
125
MHz
tcac
CAS
Latency
3
cycle
trcd
ActiveCommandToRead/WriteCommandDelayTime
3
cycle
trac
RAS
Latency(trcd + tcac)
CAS
Latency=3
6
cycle
trc
CommandPeriod(REFtoREF/ACTtoACT)
9
cycle
tras
CommandPeriod(ACTtoPRE)
6
cycle
trp
CommandPeriod(PREtoACT)
3
cycle
trrd
CommandPeriod(ACT[0]toACT[1])
2
cycle
tccd
ColumnCommandDelayTime
1
cycle
(READ,READA,WRIT,WRITA)
tdpl
InputDataToPrechargeCommandDelayTime
2
cycle
tdal
InputDataToActive/RefreshCommandDelayTime
5
cycle
(DuringAuto-Precharge)
trbd
BurstStopCommandToOutputinHIGH-ZDelayTime
CAS
Latency=3
3
cycle
(Read)
twbd
BurstStopCommandToInputinInvalidDelayTime
0
cycle
(Write)
trql
PrechargeCommandToOutputinHIGH-ZDelayTime
CAS
Latency=3
3
cycle
(Read)
twdl
PrechargeCommandToInputinInvalidDelayTime
0
cycle
(Write)
tpql
LastOutputToAuto-PrechargeStartTime(Read)
CAS
Latency=3
-2
cycle
tqmd
DQMToOutputDelayTime(Read)
2
cycle
tdmd
DQMToInputDelayTime(Write)
0
cycle
tmrd
ModeRegisterSetToCommandDelayTime
2
cycle
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