參數(shù)資料
型號(hào): HN29V102414T-50H
英文描述: Flash Application Design Guidelines Others
中文描述: Flash應(yīng)用程序設(shè)計(jì)指南其他
文件頁數(shù): 5/46頁
文件大?。?/td> 338K
代理商: HN29V102414T-50H
HN29V102414 Series
5
Block Diagram
32768
(2048 + 64)
×
8
memory matrix
X-decoder
Upper chip
Data register (2048 + 64)
Input
data
control
Sector
address
buffer
Y-address
counter
2048 + 64
3
V
SS
RES
CDE
Y-gating
Y-decoder
Read/Program/Erase control
Data
input
buffer
CE
OE
WE
SC
I/O0
to
I/O7
RDY/
Busy
V
CC
Multiplexer
Control
signal
buffer
Data
output
buffer
32768
×
(2048 + 64)
×
8
memory matrix
X-decoder
Lower chip
Data register (2048 + 64)
Input
data
control
Sector
address
buffer
Y-address
counter
2048 + 64
3
V
SS
RES
CDE
Y-gating
Y-decoder
Read/Program/Erase control
Data
input
buffer
CE
OE
WE
SC
I/O0
to
I/O7
RDY/
Busy
V
CC
Multiplexer
Control
signal
buffer
Data
output
buffer
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