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| 型號(hào)： | GT28F320D18B120 |
| 英文描述： | x16 Flash EEPROM |
| 中文描述： | x16閃存EEPROM |
| 文件頁(yè)數(shù)： | 19/83頁(yè) |
| 文件大小： | 836K |
| 代理商： | GT28F320D18B120 |
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28F320D18
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NOTE:
1. Commands other than those shown above are reserved by Intel for future device implementations and
should not be used.
2.
First cycle command addresses should be the same as the operation’s target address. Examples: the first-
cycle address for the Read Device Identification Codes command should be the same as the Identification
Code address (IA); the first cycle address for the Program command should be the same as the word
address (WA) to be programmed; the first cycle address for the Erase/Program Suspend command should
be the same as the address within the block to be suspended; etc.
CA = Identification code address.
BA = Address within the block.
LPA = Lock Protection Address is obtained from the CFI (via the Read Query command). 1.8 V Dual-Plane
Flash memory’s LPA is at 0080h.
PA = User programmable 4-word protection address in the device identification plane.
PnA = Address within the partition.
QA = Query code address.
WA = Word address of memory location to be written.
3. SRD = Data read from the status register.
WD = Data to be written at location WA is latched on the rising edge of WE# or CE# (whichever goes high
first).
CD = Identifier code data.
PD =User programmable 4-word protection data.
QD = Query code data.
RCD = Read Configuration register code data presented on device addresses A
. Upper address bits can
select either partition
.
See
Table 8
for read configuration register bits descriptions.
4. Following the Read Device Identification Codes or Read Query commands, read operations output
manufacturer and device configuration or CFI query information and the read configuration register.
5. Read Device Identification and Read Query addresses must be within the bottom partition.
6. Following a block erase, program, and suspend operation, read operations access the status register.
7. The WSM recognizes either 40H or 10H program setup commands.
Table 5. Command Definitions
(1)
Bus
Cycles
Notes
First Bus Cycle
Second Bus Cycle
Command
Oper
Addr
(2)
Data
(3)
Oper
Addr
(2
Data
(3)
R
Read Array/Reset
1
Write
PnA
FFH
Read Device Identification Codes
≥
2
4,5
Write
CA
90H
Read
CA
CD
Read Query
≥
2
4,5
Write
QA
98H
Read
QA
QD
Read Status Register
2
Write
BA
70H
Read
BA
SRD
Clear Status Register
1
Write
BA
50H
P
E
Block Erase
2
7
Write
BA
20H
Write
BA
D0H
Program
2
6, 7
Write
WA
40H/
10H
Write
WA
WD
Program/Erase Suspend
1
6
Write
BA
B0H
Program/Erase Resume
1
6
Write
BA
D0H
L
Lock Block
2
Write
BA
60H
Write
BA
01H
Unlock Block
2
Write
BA
60H
Write
BA
D0H
Lock-down Block
2
Write
BA
60H
Write
BA
2FH
C
Protection Program
2
Write
PA
C0H
Write
PA
PD
Lock Protection Program
2
Write
LPA
C0H
Write
LPA
FFFDH
Set Read Configuration Register
2
2, 5
Write
RCD
60H
Write
RCD
03H
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GT28F320S3-100 | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:WORD-WIDE FlashFile⑩ MEMORY FAMILY |
| GT28F320S3-120 | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:WORD-WIDE FlashFile MEMORY FAMILY |
| GT28F320W18BC60 | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Intel? Wireless Flash Memory |
| GT28F320W18BC80 | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Intel? Wireless Flash Memory |
| GT28F320W18BD60 | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Intel㈢ Wireless Flash Memory |
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