參數(shù)資料
型號(hào): GT28F320D18B120
英文描述: x16 Flash EEPROM
中文描述: x16閃存EEPROM
文件頁(yè)數(shù): 1/83頁(yè)
文件大?。?/td> 836K
代理商: GT28F320D18B120
1.8 Volt Intel
Dual-Plane Flash Memory
28F320D18 (x16)
Product Preview Datasheet
Product Features
The 1.8 Volt Intel
Dual-Plane Flash memory provides high performance asynchronous and synchronous
burst reads. It is an ideal memory for low-voltage burst CPUs. Combining high read performance with flash
memory’s intrinsic nonvolatility, 1.8 Volt Dual-Plane Flash memory eliminates the traditional system-
performance paradigm of shadowing redundant code memory from slow nonvolatile storage to faster
execution memory. It reduces the total memory requirement that increase reliability and reduces overall
system power consumption and cost.
The 1.8 Volt Dual-Plane Flash memory’s two partitions allow background programming or erasing to occur
in one partition while program-execution reads take place in the other partition. This allows for higher data
write throughput compared to single partition architectures. The dual partition architecture also allows two
processors to interleave code operations while program and erase operations take place in the background.
1.8 Volt Dual-Plane Flash memory is manufactured on Intel
0.25 μm ETOX VI process technology. It is
available in an industry-standard μBGA* CSP package which is ideal for board-constrained applications.
I
32-Mbit density with 16-Bit Data Bus
I
High Performance Reads
—110/40 ns 4-Word Page Mode
—40 MHz (110/20 ns) Zero Wait-State
Synchronous Burst Mode
I
Dual Partition Architecture
—25%/75% Partition Sizes
32 Mb
8 Mb + 24 Mb
—Program or Erase during Reads
—Status Register for Each Partition
I
Low Power Operation
—1.8 V Read and Write Operations
—V
for I/O Isolation and System
Compatibility
—Automatic Power Savings Mode
I
Enhanced Code + Data Storage
—Flash Data Integrator (FDI) Software
Optimized
—5 μs Typical Program/Erase Suspends
I
128-Bit Protection Register
—64 Unique Device Identifier Bits
—64 User-Programmable OTP Bits
I
μBGA* CSP 60-Ball 7x8 Matrix (four support
balls)
I
Flexible Blocking Architecture
—Eight, 4-Kword Parameter Code/Data Blocks
—Sixty-three, 32-Kword Main Code/Data
Blocks
I
Enhanced Data Protection
—V
PP
= GND
Absolute Write Protection
—Erase/Program Lockout during Power
Transitions
—Individual Dynamic Zero-Latency Block
Locking
—Individual Block Lock-Down
I
Automated Program/Erase Algorithms
—1.8 V Low-Power 22 μs/Word (Typ)
Programming
—12 V No Glue Logic 8 μs/Word (Typ)
Production Programming and 1.1 sec Erase
(Typ)
I
Cross-Compatible Command Support
—Intel Basic Command Set
—Common Flash Interface (CFI)
I
Extended Temperature –40° C to +85° C
I
Minimum 100,000 Block Erase Cycles
I
ETOX VI Flash Technology (0.25 μm)
Order Number: 290672-002
October 1999
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