參數(shù)資料
型號： GT28F320D18B120
英文描述： x16 Flash EEPROM
中文描述： x16閃存EEPROM
文件頁數(shù)： 17/83頁
文件大?。?/td> 836K
代理商： GT28F320D18B120
28F320D18
Product Preview
13
To change block locking during an erase operation, first write the erase suspend command (B0H),
then check the status register until it indicates that the erase operation has been suspended. Next
write the desired lock command sequence to a block and the lock status will be changed. After
completing any desired lock, read, or program operations, resume the erase operation with the
Erase Resume command (D0H).
If a block is locked or locked-down during a suspended erase of the same block, the locking status
bits will be changed immediately, but when the erase is resumed, the erase operation will complete.
Locking operations cannot be performed during a program suspend.
3.2.7
Status Register Error Checking
Using nested locking or program command sequences during erase suspend can introduce
ambiguity into status register results.
Since locking changes are performed using a two cycle command sequence, e.g., 60H followed by
01H to lock a block, following the Configuration Setup command (60H) with an invalid command
will produce a lock command error (SR.4 and SR.5 will be set to 1) in the status register. If a lock
command error occurs during an erase suspend, SR.4 and SR.5 will be set to 1, and will remain at 1
after the erase is resumed. When erase is complete, any possible error during the erase cannot be
detected via the status register because of the previous locking command error.
A similar situation happens if an error occurs during a program operation error nested within an
erase suspend.
3.2.8
V
PP
≤
V
PPLK
for Complete Protection
The V
PP
programming voltage can be held low for complete write protection of all blocks in the
flash device. When V
PP
is below V
PPLK
, any block erase or program operation will result in a
error, prompting the corresponding status register bit (SR.3) to be set.
3.3
128-Bit Protection Register
1.8 Volt Dual-Plane Flash memory includes a 128-bit protection register than can be used to
enhance the security of a system design. For example, the number contained in the protection
register can be used to match the flash component with other system components such as the CPU
or ASIC, preventing device substitution. Additional application information can be found in Intel
application note
AP-657
Designing with the Advanced+ Boot Block Flash Memory Architecture
.
The 128-bit protection register is divided into two 64-bit segments (
Figure 4, “Protection Register
Memory Map” on page 14
). The Intel segment is programmed at the Intel factory with a unique 64-
bit number, which is not changeable. The customer segment is blank allowing customers to
program as desired. Once the customer segment is programmed, it can be locked to prevent
reprogramming.
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