參數(shù)資料
型號： GCIXF440AC
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù)： 69/128頁
文件大?。?/td> 1262K
代理商： GCIXF440AC
Intel
IXF1002 Dual Port Gigabit Ethernet Controller
Datasheet
69
4.3.1.1
Packet Status
When packet status mode is enabled (PORT_MODE<PS_D=0>, the packet status is appended to
any received packet completely transferred onto the IX Bus, and is driven onto the IX Bus in the
access following the last byte transfer. The packet status is driven on the IX Bus according to the
description in
Table 7
. In full 64-bit FIFO mode, the status will be driven on fdat<63:32> and
fdat<31:0>. In narrow and split IX Bus modes, the status will be driven on fdat<31:0>. The status
will always be driven as little endian data as described in
Figure 5
,
Figure 6
, and
Figure 7
. During
status transfer, the value of the fbe_l<7:0> signals have no meaning and should be ignored. The full
status word is always valid.
If the eop signal is asserted on the last cycle of the burst, the rxrdy signal will be asserted, and the
packet status will pass in the next burst of the rxsel_l signal.
The packet length reports the number of bytes received in this packet on the serial line, independent
of the packet transfer on the IX Bus.
Table 7
describes the IX Bus receive packet status.
4.3.2
Header Preprocessing
The IXF1002 supports the ability to process the packet header in several ways. The header size is
programmable (TX_RX_PARAM<HDRS>) and may be changed according to the required
processing (for example, MAC header, VLAN header, or Layer3 header).
When header-ready mode is enabled (FFO_BUS<HRYD=0>) and a packet header has been fully
loaded into the receive FIFO, the IXF1002 will assert the rxrdy signal even if the header size is
smaller than the programmed receive threshold (FFO_TSHD<RTH>). In this case, the first burst of
a packet must be shorter than or equal to the header size.
Table 7. IX Bus Receive Packet Status
Bit Name
Bit Number
Bit Description
LEN
31:16
Packet length
—
15:11
RESERVED
MLT
10
Multicast packet
BRD
9
Broadcast packet
ROK
8
Receive OK
FLW
7
Flow-control packet
—
6
RESERVED
GMER
5
GMII error
RTL
4
Too long packet
SHRT
3
Short packet
—
2
RESERVED
CRC
1
CRC error
OVF
0
Receive FIFO overflow (if set, LEN field is not valid)
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