參數(shù)資料
型號(hào)： GCIXF440AC
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁數(shù)： 12/128頁
文件大小： 1262K
代理商： GCIXF440AC
Intel
IXF1002 Dual Port Gigabit Ethernet Controller
12
Datasheet
cdat<15:0>
I/O
CPU data bus.
In 8 bit mode (default):
cdat<7:0> carries data to be written to or read from the registers.
cdat<15:8> should be connected to pull up resistors.
In 16 bit mode:
cdat<15:0> carries data to be written to or read from the registers.
Interrupt lines.
These signals are asserted following a variety of programmable conditions.
Deassertion occurs after reading the events that cause the interrupt, unless
another interrupt is registered meanwhile.
General reset.
Upon reset, all the registers are reset to their default values and the FIFOs are
flushed.
reset_l assertion time should be at least 1 ms.
cint{i}_l
OD
reset_l
I
IX Bus Interface
clamp
I
Vdd clamp.
Should be connected to the power of the highest signal level used on the IX Bus.
System clock.
All the FIFO data transfers are synchronized to this clock.
Transmit select.
This pin must be asserted to enable transmit FIFO write access.
Receive select.
This pin must be asserted to enable receive FIFO read access. The following
signals are driven by the IXF1002 upon assertion of rxsel_l:
FIFO port select.
In full-64 mode and in narrow mode (fps):
When asserted, selects port no. 1 for data transfer through the IX Bus.
When deasserted, selects port no. 0 for data transfer through the IX Bus.
In split mode(fps_rxf):
Selects one of the ports for reading data, through fdat<31:0>, from the
receive FIFO of the selected port.
FIFO port select.
In full-64 mode and in narrow mode:
Not in use, should be connected to pull up resistors.
In split mode:
Selects one of the ports for writing data, through fdat<63:32>, to the transmit
FIFO of the selected port.
clk
I
txsel_l
I
rxsel_l
I
fdat<63:0>, fbe_l<7:0>, sop, eop and rxfail in full-64 IX Bus mode
.
fdat<31:0>, fbe_l<3:0>, sop_rxf, eop_rxf and rxfail in split IX Bus mode
.
fdat<31:0>, fbe_l<3:0>, sop, eop and rxfail in narrow IX Bus mode
.
fps/fps_rxf
I
fps_txf
I
Table 2. Signal Descriptions (Sheet 2 of 6)
Signal Name
I/O
Pin Description
相關(guān)PDF資料
PDF描述
GCIXF440ACT Controller Miscellaneous - Datasheet Reference
GCIXP1250-166 Microprocessor
GCIXP1250-200 Microprocessor
GCIXP1250-232 Microprocessor
GCK101 Analog IC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GCIXF440ACT 制造商:Rochester Electronics LLC 功能描述: 制造商:Intel 功能描述:
GCIXP1200EB 功能描述:IC NETWRK PROCESSR 200MHZ 432BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:60 系列:SCC 處理器類型:Z380 特點(diǎn):全靜電 Z380 CPU 速度:20MHz 電壓:5V 安裝類型:表面貼裝 封裝/外殼:144-LQFP 供應(yīng)商設(shè)備封裝:144-LQFP 包裝:托盤
GCIXP1200FC 功能描述:IC NETWRK PROCESSR 232MHZ 432BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:60 系列:SCC 處理器類型:Z380 特點(diǎn):全靜電 Z380 CPU 速度:20MHz 電壓:5V 安裝類型:表面貼裝 封裝/外殼:144-LQFP 供應(yīng)商設(shè)備封裝:144-LQFP 包裝:托盤
GCIXP1200GA 功能描述:IC MPU NETWORK 166MHZ 432-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:60 系列:SCC 處理器類型:Z380 特點(diǎn):全靜電 Z380 CPU 速度:20MHz 電壓:5V 安裝類型:表面貼裝 封裝/外殼:144-LQFP 供應(yīng)商設(shè)備封裝:144-LQFP 包裝:托盤
GCIXP1200GB 功能描述:IC MPU NETWORK 200MHZ 432-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點(diǎn):- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*