參數(shù)資料
型號: GCIXF440AC
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù): 49/128頁
文件大?。?/td> 1262K
代理商: GCIXF440AC
Intel
IXF1002 Dual Port Gigabit Ethernet Controller
Datasheet
49
3.2.5.4
AN Link Partner Ability Base Page Register
Mnemonic: AN_PRT_ABL
Address: 5AH
5BH
The AN link partner ability base page register contains the advertised ability of the partner
s device.
This register is updated once every Auto-Negotiation process, at the end of the page exchange state.
Bit Name
Bit #
Bit Description
NXTPG
15
Next page.
When set, indicates a request for next page exchange was made by the link partner.
ACK
14
Acknowledge
.
When set, indicates that the link partner has successfully received the base page of the
local device.
RF
13:12
Remote fault.
The remote fault bits are used to notify the local device about a fault that had occurred at
the link partner device. The table below specifies the remote fault encoding.
<12>
<13>
Description
0
0
No error, link OK
0
1
Off line
1
0
Link failure
1
1
Auto-Negotiation error
11:9
RESERVED
ASM_DIR
8
Asymmetric PAUSE connection is desired.
When set, results in independent enabling of the flow-control receive and transmit.
When reset, results in symmetric enabling of the flow-control receive and transmit.
PAUSE
7
Capable of configuring the PAUSE function.
When set, indicates that the link partner
s
device is capable and intends to stop upon reception of flow-control packets, as defined in
IEEE 802.3x.
HD
6
Half duplex.
When set, indicates link partner
s half-duplex capability.
FD
5
Full duplex.
When set, indicates link partner
s full-duplex capability.
4:0
RESERVED
Access Rules
Register
access
R
Value
after reset
0000H
A4990-01
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
F
N
X
T
P
G
A
C
K
F
D
H
D
P
A
U
S
E
A
S
M
_
D
I
R
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