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| 型號： | EVAL-ADUC824QSZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 52/68頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT DEV QUICK START ADUC824 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | QuickStart™ 套件 |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | ADuC824 |
| 所含物品： | 評估板，線纜，電源，軟件和文檔 |
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REV. B
ADuC824
–56–
Timer/Counter 2 Operating Modes
The following paragraphs describe the operating modes for timer/
counter 2. The operating modes are selected by bits in the T2CON
SFR as shown in Table XXVI.
Table XXVI. TIMECON SFR Bit Designations
RCLK (or) TCLK
CAP2
TR2
MODE
0
1
16-Bit Autoreload
0
1
16-Bit Capture
1
X
1
Baud Rate
X
0
OFF
16-Bit Autoreload Mode
In ‘Autoreload’ mode, there are two options, which are selected
by bit EXEN2 in T2CON. If EXEN2 = 0, then when Timer 2
rolls over it not only sets TF2 but also causes the Timer 2 registers
to be reloaded with the 16-bit value in registers RCAP2L and
RCAP2H, which are preset by software. If EXEN2 = 1, then
Timer 2 still performs the above, but with the added feature that
a 1-to-0 transition at external input T2EX will also trigger the
16-bit reload and set EXF2. The autoreload mode is illustrated
in Figure 38.
CORE
CLK*
12
T2
PIN
C/
T2 = 0
C/
T2 = 1
TR2
CONTROL
TL2
(8-BITS)
TH2
(8-BITS)
RELOAD
TF2
EXF2
TIMER
INTERRUPT
EXEN2
CONTROL
TRANSITION
DETECTOR
T2EX
PIN
RCAP2L
RCAP2H
*THE CORE CLOCK IS THE OUTPUT OF THE PLL AS DESCRIBED ON PAGE 42.
Figure 38. Timer/Counter 2, 16-Bit Autoreload Mode
TF2
CORE
CLK*
12
T2
PIN
TR2
CONTROL
TL2
(8-BITS)
TH2
(8-BITS)
CAPTURE
EXF2
TIMER
INTERRUPT
EXEN2
CONTROL
TRANSITION
DETECTOR
T2EX
PIN
RCAP2L
RCAP2H
C/
T2 = 0
C/
T2 = 1
*THE CORE CLOCK IS THE OUTPUT OF THE PLL AS DESCRIBED ON PAGE 42.
Figure 39. Timer/Counter 2, 16-Bit Capture Mode
16-Bit Capture Mode
In the ‘Capture’ mode, there are again two options, which are
selected by bit EXEN2 in T2CON. If EXEN2 = 0, then Timer 2
is a 16-bit timer or counter which, upon overflowing, sets bit TF2,
the Timer 2 overflow bit, which can be used to generate an inter-
rupt. If EXEN2 = 1, then Timer 2 still performs the above, but
a l-to-0 transition on external input T2EX causes the current value
in the Timer 2 registers, TL2 and TH2, to be captured into regis-
ters RCAP2L and RCAP2H, respectively. In addition, the
transition at T2EX causes bit EXF2 in T2CON to be set, and
EXF2, like TF2, can generate an interrupt. The Capture Mode
is illustrated in Figure 39.
The baud rate generator mode is selected by RCLK = 1 and/or
TCLK = 1.
In either case if Timer 2 is being used to generate the baud rate,
the TF2 interrupt flag will not occur. Hence Timer 2 interrupts
will not occur so they do not have to be disabled. In this mode
the EXF2 flag, however, can still cause interrupts and this can
be used as a third external interrupt.
Baud rate generation will be described as part of the UART
serial port operation in the following pages.
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| EVAL-ADUC832QS | 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Bulk 制造商:Analog Devices 功能描述:DEVELOPMENT KIT SYSTEM |
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