參數(shù)資料
型號(hào)： EVAL-ADUC824QSZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 39/68頁(yè)
文件大?。?/td> 0K
描述： KIT DEV QUICK START ADUC824
標(biāo)準(zhǔn)包裝： 1
系列： QuickStart™ 套件
類型： MCU
適用于相關(guān)產(chǎn)品： ADuC824
所含物品： 評(píng)估板，線纜，電源，軟件和文檔
REV. B
ADuC824
–44–
TIMECON
TIC Control Register
SFR Address
A1H
Power-On Default Value
00H
Bit Addressable
No
——
1
S
T
I0
S
T
II
T
SI
I
TN
E
I
TN
E
C
I
Table XVI. TIMECON SFR Bit Designations
Bit
Name
Description
7
—
Reserved for Future Use
6
—
Reserved for Future Use. For future product code compatibility this bit should be written as a ‘1.’
5
ITS1
Interval Timebase Selection Bits.
4
ITS0
Written by user to determine the interval counter update rate.
ITS1
ITS0
Interval Timebase
0
1/128 Second
0
1
Seconds
1
0
Minutes
1
Hours
3
STI
Single Time Interval Bit
Set by user to generate a single interval timeout. If set, a timeout will clear the TIEN bit.
Cleared by user to allow the interval counter to be automatically reloaded and start counting again at
each interval timeout.
2
TII
TIC Interrupt Bit
Set when the 8-bit Interval Counter matches the value in the INTVAL SFR.
Cleared by user software.
1
TIEN
Time Interval Enable Bit
Set by user to enable the 8-bit time interval counter.
Cleared by user to disable and clear the contents of the interval counter.
0
TCEN
Time Clock Enable Bit
Set by user to enable the time clock to the time interval counters.
Cleared by user to disable the clock to the time interval counters and clear the time interval SFRs.
The time registers (HTHSEC, SEC, MIN and HOUR) can be written while TCEN is low.
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