- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄1917 > DSPB56366AG120 (Freescale Semiconductor)IC DSP 24BIT AUD 120MHZ 144-LQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | DSPB56366AG120 |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 18/110頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP 24BIT AUD 120MHZ 144-LQFP |
| 產(chǎn)品變化通告： | Product Discontinuation 24/Feb/2012 |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 系列： | DSP56K/Symphony |
| 類型： | 音頻處理器 |
| 接口： | 主機(jī)接口，I²C，SAI，SPI |
| 時(shí)鐘速率： | 120MHz |
| 非易失內(nèi)存： | ROM（240 kB） |
| 芯片上RAM： | 69kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 3.30V |
| 工作溫度： | -40°C ~ 110°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LQFP |
| 供應(yīng)商設(shè)備封裝： | 144-LQFP（20x20） |
| 包裝： | 托盤(pán) |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)當(dāng)前第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)
DSP56366 Technical Data, Rev. 3.1
Freescale Semiconductor
2-11
HA10
Input
GPIO
disconnected
Host Address 10—When HDI08 is programmed to interface a multiplexed
host bus and the HI function is selected, this signal is line 10 of the host
address (HA10) input bus.
PB13
Input, output, or
disconnected
GPIO
disconnected
Port B 13—When the HDI08 is configured as GPIO, this signal is
individually programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
HOREQ/
HOREQ
Output
GPIO
disconnected
Host Request—When HDI08 is programmed to interface a single host
request host bus and the HI function is selected, this signal is the host
request (HOREQ) output. The polarity of the host request is programmable,
but is configured as active-low (HOREQ) following reset. The host request
may be programmed as a driven or open-drain output.
HTRQ/
HTRQ
Output
GPIO
disconnected
Transmit Host Request—When HDI08 is programmed to interface a
double host request host bus and the HI function is selected, this signal is
the transmit host request (HTRQ) output. The polarity of the host request is
programmable, but is configured as active-low (HTRQ) following reset. The
host request may be programmed as a driven or open-drain output.
PB14
Input, output, or
disconnected
GPIO
disconnected
Port B 14—When the HDI08 is configured as GPIO, this signal is
individually programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
HACK/
HACK
Input
GPIO
disconnected
Host Acknowledge—When HDI08 is programmed to interface a single
host request host bus and the HI function is selected, this signal is the host
acknowledge (HACK) Schmitt-trigger input. The polarity of the host
acknowledge is programmable, but is configured as active-low (HACK) after
reset.
HRRQ/
HRRQ
Output
GPIO
disconnected
Receive Host Request—When HDI08 is programmed to interface a double
host request host bus and the HI function is selected, this signal is the
receive host request (HRRQ) output. The polarity of the host request is
programmable, but is configured as active-low (HRRQ) after reset. The host
request may be programmed as a driven or open-drain output.
PB15
Input, output, or
disconnected
GPIO
disconnected
Port B 15—When the HDI08 is configured as GPIO, this signal is
individually programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
Table 2-9 Host Interface (continued)
Signal Name
Type
State during
Reset
Signal Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSPB56367AG150 | IC DSP 24BIT 150MHZ 144-LQFP |
| DSPB56371AF180 | IC DSP 24BIT 180MHZ 80-LQFP |
| DSPB56374AEC | IC DSP 24BIT 150MHZ 52-LQFP |
| DSPB56720CAG | DSP 24BIT AUD 200MHZ 144-LQFP |
| DSPB56724AG | DSP 24BIT AUD 250MHZ 144-LQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSPB56366PV120 | 制造商:Motorola Inc 功能描述: 制造商:Freescale Semiconductor 功能描述:IC 制造商:MOTOROLA 功能描述: |
| DSPB56367AG150 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 150Mhz/150MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DSPB56367PV150 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 150Mhz/ 150MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DSPB5636AG120 | 制造商:Freescale Semiconductor 功能描述: |
| DSPB56371AF150 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 150 MHZ VERSION DSPB371 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。