參數(shù)資料
型號(hào): DSP56301VF100
廠商: Freescale Semiconductor
文件頁數(shù): 38/124頁
文件大?。?/td> 0K
描述: IC DSP 24BIT FIXED-POINT 252-BGA
產(chǎn)品變化通告: DSP56301 Discontinuation 12/Nov/2009
標(biāo)準(zhǔn)包裝: 60
系列: DSP563xx
類型: 定點(diǎn)
接口: 主機(jī)接口,SSI,SCI
時(shí)鐘速率: 100MHz
非易失內(nèi)存: ROM(9 kB)
芯片上RAM: 24kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 3.30V
工作溫度: -40°C ~ 100°C
安裝類型: 表面貼裝
封裝/外殼: 252-BGA
供應(yīng)商設(shè)備封裝: 252-MAPBGA(21x21)
包裝: 托盤
DSP56301 Technical Data, Rev. 10
1-16
Freescale Semiconductor
Signals/Connections
1.8 Enhanced Synchronous Serial Interface 0 (ESSI0)
Two synchronous serial interfaces (ESSI0 and ESSI1) provide a full-duplex serial port for serial communication
with a variety of serial devices, including one or more industry-standard codecs, other DSPs, microprocessors, and
peripherals that implement the Serial Peripheral Interface (SPI).
Table 1-12.
Enhanced Synchronous Serial Interface 0 (ESSI0)
Signal Name
Type
State During
Reset
Signal Description
SC00
PC0
Input or Output
Input
Serial Control 0
Functions in either Synchronous or Asynchronous mode. For Asynchronous
mode, this signal is the receive clock I/O (Schmitt-trigger input). For
Synchronous mode, this signal is either for Transmitter 1 output or Serial I/O
Flag 0.
Port C 0
The default configuration following reset is GPIO. For PC0, signal direction is
controlled through the Port Directions Register (PRR0). The signal can be
configured as ESSI signal SC00 through the Port Control Register (PCR0).
This input is 5 V tolerant.
SC01
PC1
Input/Output
Input or Output
Input
Serial Control 1
Functions in either Synchronous or Asynchronous mode. For Asynchronous
mode, this signal is the receiver frame sync I/O. For Synchronous mode, this
signal is either Transmitter 2 output or Serial I/O Flag 1.
Port C 1
The default configuration following reset is GPIO. For PC1, signal direction is
controlled through PRR0. The signal can be configured as an ESSI signal
SC01 through PCR0.
This input is 5 V tolerant.
SC02
PC2
Input/Output
Input or Output
Input
Serial Control Signal 2
The frame sync for both the transmitter and receiver in Synchronous mode,
and for the transmitter only in Asynchronous mode. When configured as an
output, this signal is the internally generated frame sync signal. When
configured as an input, this signal receives an external frame sync signal for
the transmitter (and the receiver in synchronous operation).
Port C 2
The default configuration following reset is GPIO. For PC2, signal direction is
controlled through PRR0. The signal can be configured as an ESSI signal
SC02 through PCR0.
This input is 5 V tolerant.
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