參數(shù)資料
型號： DSP56301VF100
廠商： Freescale Semiconductor
文件頁數(shù)： 33/124頁
文件大?。?/td> 0K
描述： IC DSP 24BIT FIXED-POINT 252-BGA
產(chǎn)品變化通告： DSP56301 Discontinuation 12/Nov/2009
標(biāo)準(zhǔn)包裝： 60
系列： DSP563xx
類型： 定點(diǎn)
接口： 主機(jī)接口，SSI，SCI
時鐘速率： 100MHz
非易失內(nèi)存： ROM（9 kB）
芯片上RAM： 24kB
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 3.30V
工作溫度： -40°C ~ 100°C
安裝類型： 表面貼裝
封裝/外殼： 252-BGA
供應(yīng)商設(shè)備封裝： 252-MAPBGA（21x21）
包裝： 托盤
DSP56301 Technical Data, Rev. 10
1-12
Freescale Semiconductor
Signals/Connections
HTRDY
HDBEN
PB20
Input/
Output
Input or Output
Tri-stated
Host Target Ready
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host Target Ready signal.
Host Data Bus Enable
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Data Bus Enable signal.
Port B 20
When the HI32 is configured as GPIO through the DCTR, this signal is
individually programmed through the HI32 DIRH.
This input is 5 V tolerant.
HIRDY
HDBDR
PB21
Input/
Output
Input or Output
Tri-stated
Host Initiator Ready
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host Initiator Ready signal.
Host Data Bus Direction
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Data Bus Direction signal.
Port B 21
When the HI32 is configured as GPIO through the DCTR, this signal is
individually programmed through the HI32 DIRH.
This input is 5 V tolerant.
HDEVSEL
HSAK
PB22
Input/
Output
Input or Output
Tri-stated
Host Device Select
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host Device Select signal.
Host Select Acknowledge
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Select Acknowledge signal.
Port B 22
When the HI32 is configured as GPIO through the DCTR, this signal is
individually programmed through the HI32 DIRH.
This input is 5 V tolerant.
HLOCK
HBS
PB23
Input
Input or Output
Tri-stated
Host Lock
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host Lock signal.
Host Bus Strobe
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Bus Strobe Schmitt-trigger signal.
Port B 23
When the HI32 is configured as GPIO through the DCTR, this signal is
individually programmed through the HI32 DIRH.
This input is 5 V tolerant.
Table 1-11.
Host Interface (Continued)
Signal Name
Type
State During
Reset
Signal Description
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