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參數(shù)資料
| 型號(hào)： | BXM80526B700 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 64-BIT, 700 MHz, MICROPROCESSOR, CPGA495 |
| 封裝： | MICRO, PGA2-495 |
| 文件頁(yè)數(shù)： | 43/85頁(yè) |
| 文件大?。?/td> | 795K |
| 代理商： | BXM80526B700 |
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Mobile Intel Pentium III Processor in BGA2 and Micro-PGA2 Packages
at 850 MHz, 800 MHz, 750 MHz, 700 MHz, and Low-voltage 600 MHz
Datasheet
Order#-XXX
40
Table 27. Non-GTL+ Signal Group Overshoot/Undershoot Tolerance at the Processor Core
1, 4, 5
Overshoot Amplitude
2
Undershoot Amplitude
3
Allowed Pulse Duration
2.1V
-0.45V
0.45 ns
2.0V
-0.35V
1.5 ns
1.9V
-0.25V
5.0 ns
1.8V
-0.15V
17 ns
NOTES:
1.
Under no circumstances should the non-GTL+ signal voltage ever exceed 2.1V maximum with respect to ground or -2.1V
minimum with respect to VCCT (i.e., VCCT - 2.1V) under operating conditions.
2.
Ring-backs below VCCT cannot be subtracted from overshoots. Lesser undershoot does not allocate longer or larger
overshoot.
3.
Ring-backs above ground cannot be subtracted from undershoots. Lesser overshoot does not allocate longer or larger
undershoot.
4.
System designers are encouraged to follow Intel provided non-GTL+ layout guidelines.
5.
All values are specified by design characterization, and are not tested.
4.3.1 PWRGOOD Signal Quality Specifications
The processor requires PWRGOOD to be a clean indication that clocks and the power supplies
(VCC, VCCT, etc.) are stable and within their specifications. Clean implies that the signal will
remain below VIL25 and without errors from the time that the power supplies are turned on, until
they come within specification. The signal will then transition monotonically to a high (2.5V)
state. PWRGOOD may not ringback below 2.0V after rising above VIH25.
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