參數(shù)資料
型號： BXM80526B700
廠商： INTEL CORP
元件分類： 微控制器/微處理器
英文描述： 64-BIT, 700 MHz, MICROPROCESSOR, CPGA495
封裝： MICRO, PGA2-495
文件頁數(shù)： 27/85頁
文件大小： 795K
代理商： BXM80526B700
Mobile Intel Pentium III Processor in BGA2 and Micro-PGA2 Packages
at 850 MHz, 800 MHz, 750 MHz, 700 MHz, and Low-voltage 600 MHz
Order#-XXX
Datasheet
25
Table 17. Reset Configuration AC Specifications
TJ = 0°C to 100°C; VCC = 1.10V ±80 mV; VCC = 1.35V ±100 mV or 1.60V ±115 mV; VCCT = 1.50V ±115 mV
Symbol Parameter
Min Max Unit
Figure
Notes
T16
Reset Configuration Signals (A[15:5]#, BREQ0#,
FLUSH#, INIT#, PICD0) Setup Time
4BCLKs Figure 8.
Figure 9
Before
deassertion of
RESET#
T17
Reset Configuration Signals (A[15:5]#, BREQ0#,
FLUSH#, INIT#, PICD0) Hold Time
220
BCLKs Figure 8.
Figure 9
After clock that
deasserts
RESET#
T18
RESET#/PWRGOOD Setup Time
1
ms
Figure 11 Before
deassertion of
RESET#
1
NOTE:
At least 1 ms must pass after PWRGOOD rises above VIH25,min from Table 12 and BCLK meets its AC timing
specification until RESET# may be deasserted.
Table 18. APIC Bus Signal AC Specifications
1
TJ = 0°C to 100°C; VCC = 1.10V ±80 mV; VCC = 1.35V ±100 mV or 1.60V ±115 mV; VCCT = 1.50V ±115 mV
Symbol Parameter
Min
Max
Unit
Figure
Notes
T21
PICCLK Frequency
2
33.3
MHz
Note 2
T22
PICCLK Period
30
500
ns
Figure 6
T23
PICCLK High Time
10.5
ns
Figure 6
at>1.7V
T24
PICCLK Low Time
10.5
ns
Figure 6
at<0.7V
T25
PICCLK Rise Time
0.25
3.0
ns
Figure 6
(0.7V – 1.7V)
T26
PICCLK Fall Time
0.25
3.0
ns
Figure 6
(1.7V – 0.7V)
T27
PICD[1:0] Setup Time
5.0
ns
Figure 9
Note 3
T28
PICD[1:0] Hold Time
2.5
ns
Figure 9
Note 3
T29
PICD[1:0] Valid Delay (Rising Edge)
PICD[1:0] Valid Delay (Falling Edge)
1.5
8.7
12.0
Ns
ns
Figure 8
Notes 3, 4, 5
NOTES:
1.
All AC timings for APIC signals are referenced to the PICCLK rising edge at 1.25V. All CMOS signals are referenced at
0.75V.
2.
The minimum frequency is 2 MHz when PICD0 is at 1.5V at reset. If PICD0 is strapped to VSS at reset then the minimum
frequency is 0 MHz.
3.
Referenced to PICCLK Rising Edge.
4.
For Open-drain signals, Valid Delay is synonymous with Float Delay.
5.
Valid delay timings for these signals are specified into 150
to 1.5V and 0 pF of external load. For real system timings
these specifications must be derated for external capacitance at 105 ps/pF.
相關(guān)PDF資料
PDF描述
BXM80536GC2100F 32-BIT, 2100 MHz, MICROPROCESSOR, CPGA478
BXM80536GC1800F 32-BIT, 1800 MHz, MICROPROCESSOR, CPGA478
BXM80536GC1600F 32-BIT, 1600 MHz, MICROPROCESSOR, CPGA478
BYP60K4 60 A, 400 V, SILICON, RECTIFIER DIODE
BYS10-45TR3 1.5 A, 45 V, SILICON, RECTIFIER DIODE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
BXM80536NC1400ES L7LS 制造商:Intel 功能描述:CELERON M,360,1.40GHZ,1M CACHE, 400MHZ FSB,1.26V,UFCPGA - Boxed Product (Development Kits)
BXMP1000 制造商:SPECTRUM 制造商全稱:Spectrum Microwave, Inc. 功能描述:RF AMPLIFIER
BXMP1001 制造商:SPECTRUM 制造商全稱:Spectrum Microwave, Inc. 功能描述:RF AMPLIFIER
BXMP1002 制造商:SPECTRUM 制造商全稱:Spectrum Microwave, Inc. 功能描述:RF AMPLIFIER
BXMP1003 制造商:SPECTRUM 制造商全稱:Spectrum Microwave, Inc. 功能描述:RF AMPLIFIER
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*