參數(shù)資料
型號(hào)： BX80557E2140
廠商： INTEL CORP
元件分類(lèi)： 微控制器/微處理器
英文描述： MICROPROCESSOR, PBGA775
封裝： LGA-775
文件頁(yè)數(shù)： 97/107頁(yè)
文件大?。?/td> 1474K
代理商： BX80557E2140
Datasheet
9
Introduction
1
Introduction
The Intel Pentium Dual-Core Desktop processor E2000 series combines the
performance of the current generation of desktop products with the power efficiencies
of a low-power microarchitecture to enable smaller, quieter systems. These dual-core
processors are based on 65 nm process technology. They are 64-bit processors that
maintain compatibility with IA-32 software.
The Intel Pentium Dual-Core Desktop processor E2000 series uses Flip-Chip Land
Grid Array (FC-LGA6) package technology, and plugs into a 775-land surface mount,
Land Grid Array (LGA) socket, referred to as the LGA775 socket.
Note:
In this document, unless otherwise specified, the Intel Pentium Dual-Core Desktop
processor E2000 series refers to Intel Pentium Dual-Core Desktop processor E2200,
E2180, E2160, and E2140.
Note:
In this document, unless otherwise specified, the Intel Pentium Dual-Core Desktop
processor E2000 series is referred to as “processor.”
The processor supports advanced technologies including Execute Disable Bit, Intel 64
architecture, and Enhanced Intel SpeedStep technology.
The processor's front side bus (FSB) uses a split-transaction, deferred reply protocol
like the Intel Pentium 4 processor. The FSB uses Source-Synchronous Transfer (SST)
of address and data to improve performance by transferring data four times per bus
clock (4X data transfer rate, as in AGP 4X). Along with the 4X data bus, the address
bus can deliver addresses two times per bus clock and is referred to as a "double-
clocked" or 2X address bus. Working together, the 4X data bus and 2X address bus
provide a data bus bandwidth of up to 8.5 GB/s.
Intel will enable support components for the processor including heatsink, heatsink
retention mechanism, and socket. Manufacturability is a high priority; hence,
mechanical assembly may be completed from the top of the baseboard and should not
require any special tooling.
The processor includes an address bus power-down capability which removes power
from the address and data signals when the FSB is not in use. This feature is always
enabled on the processor.
1.1
Terminology
A ‘#’ symbol after a signal name refers to an active low signal, indicating a signal is in
the active state when driven to a low level. For example, when RESET# is low, a reset
has been requested. Conversely, when NMI is high, a nonmaskable interrupt has
occurred. In the case of signals where the name does not imply an active state but
describes part of a binary sequence (such as address or data), the ‘#’ symbol implies
that the signal is inverted. For example, D[3:0] = ‘HLHL’ refers to a hex ‘A’, and
D[3:0]# = ‘LHLH’ also refers to a hex ‘A’ (H= High logic level, L= Low logic level).
Front Side Bus” refers to the interface between the processor and system core logic
(a.k.a. the chipset components). The FSB is a multiprocessing interface to processors,
memory, and I/O.
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BX80557E4600 S LA94 制造商:Intel 功能描述:MPU Core?2 Duo Processor E4600 65nm 2.4GHz 775-Pin FCLGA6
BX80557E6300 制造商:Rochester Electronics LLC 功能描述: 制造商:Intel 功能描述:
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