參數(shù)資料
型號: AX88796
廠商: Electronic Theatre Controls, Inc.
英文描述: 3-in-1 Local Bus Fast Ethernet Controller
中文描述: 3合1本地總線快速以太網(wǎng)控制器
文件頁數(shù): 47/71頁
文件大?。?/td> 931K
代理商: AX88796
ASIX ELECTRONICS CORPORATION
47
AX88796 L 3-in-1 Local Bus Fast Ethernet Controller
5.2.13 MR21 –RXER Counter Register Bit Descriptions
FIELD
TYPE
21.0
W
This bit, when 0 puts this register in 16-bit counter mode. When 1, it puts
this register in 8-bit counter mode. This bit is reset to a 0 and cannot be read.
21.15:0
R
When in 16-bit counter mode, these maintain a count of RXERs. It is reset
on a read operation.
21.7:0
R
When in 8-bit counter mode, these maintain a count of RXERs. It is reset on
a read operation
21.11:8
R
When in 8-bit mode, these contain a count of false carrier events (802.3
section 27.3.1.5.1). It is reset on a read operation.
21.15:12
R
When in 8-bit mode, these contain a count of disconnect events (Link
Unstable 6, 802.3 section 27.3.1.5.1). It is reset on a read operation.
DESCRIPTION
5.2.14 MR28 –Device-Specific Register 1 (Status Register) Bit Descriptions
FIELD
TYPE
28.15:9 (UNUSED)
R
Unused.
Read as 0.
28.8 (BAD_FRM)
R/LH
Bad Frame.
If this bit is a 1, it indicates a packet has been received without
an SFD. This bit is only valid in 10Mbits/s mode.
This bit is latching high and will only clear after it has been read or the
device has been reset.
28.7 (CODE)
R/LH
Code Violation.
When this bit is a 1, it indicates a Manchester code
violation has occurred. The error code will be output on the MRXD lines.
Refer to Table 1 for a detailed description of the MRXD pin error codes.
This bit is only valid in 10Mbits/s mode.
This bit is latching high and will only clear after it has been read or the
device has been reset.
28.6 (APS)
R
Autopolarity Status.
When register 30, bit 3 is set and this bit is a 1, it
indicates the PHY has detected and corrected a polarity reversal on the
twisted pair.
If the APF_EN bit (register 30, bit 3) is set, the reversal will be corrected
inside the PHY. This bit is not valid in 100Mbits/s operation.
28.5 (DISCON)
R/LH
Disconnect.
If this bit is a 1, it indicates a disconnect. This bit will latch
high until read. This bit is only valid in 100Mbits/s mode.
28.4 (UNLOCKED)
R/LH
Unlocked.
Indicates that the TX scrambler lost lock. This bit will latch high
until read. This bit is only valid in 100Mbits/s mode.
28.3 (RXERR_ST)
R/LH
RX Error Status.
Indicates a false carrier. This bit will latch high until
read. This bit is only valid in 100Mbits/s mode.
28.2 (FRC_JAM)
R/LH
Force Jam.
This bit will latch high until read. This bit is only valid in
100Mbits/s mode.
28.1 (LNK100UP)
R
Link Up 100.
This bit, when set to a 1, indicates a 100Mbits/s transceiver is
up and operational.
28.0 (LNK10UP)
R
Link Up 10.
This bit, when set to a 1, indicates a 10Mbits/s transceiver is up
and operational.
DESCRIPTION
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