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參數(shù)資料
| 型號(hào)： | AX88796 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 3-in-1 Local Bus Fast Ethernet Controller |
| 中文描述： | 3合1本地總線快速以太網(wǎng)控制器 |
| 文件頁(yè)數(shù)： | 38/71頁(yè) |
| 文件大小： | 931K |
| 代理商： | AX88796 |
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ASIX ELECTRONICS CORPORATION
38
AX88796 L 3-in-1 Local Bus Fast Ethernet Controller
5.1.14 Test Register (TR) Offset 15H (Read)
FIELD
NAME
7:4
-
Reserved
3
RST_TX
B
in reset.
2
RST_10B 10BASE-T in Reset : This signal indicates that 10BASE-T logic of internal PHY is in reset.
1
RST_B Reset Busy : This signal indicates that internal PHY is in reset.
0
AUTOD Autonegotiation Done : This signal goes high whenever internal PHY autonegotiation has
completed. It will go low if autonegotiation has to restart.
DESCRIPTION
100BASE-TX in Reset : This signal indicates that 100BASE-TX logic of internal PHY is
5.1.15 General Purpose Input Register (GPI) Offset 17H (Read)
FIELD
NAME
7
-
Reserved
6
GPI2
This register reflects GPI[2] input value. May connect to external PHY speed status.
5
GPI1
This register reflects GPI[1] input value. May connect to external PHY duplex status.
4
GPI0
This register reflects GPI[0] input value. May connect to external PHY link status.
3
-
Reserved
2
I_SPD This register reflects internal PHY speed status value. Logic one means 100Mbps
1
I_DPX This register reflects internal PHY duplex status value. Logic one means full duplex.
0
I_LINK This register reflects internal PHY link status value. Logic one means link ok.
DESCRIPTION
5.1.16 GPO and Control (GPOC) Offset 17H (Write)
FIELD
NAME
7
-
Reserved
6
PPDSET Internal PHY Power Down Setting:
Default “0”, Internal PHY is in normal operation mode
Write PPDSET to “1” force Internal PHY into power down mode
5
MPSET Media Set by Program : The signal is valid only when MPSEL is set to high.
When MPSET is logic 0 , internal PHY is selected.
When MPSET is logic 1 , external MII PHY is selected.
4
MPSEL Media Priority Select :
MPSEL I_LINK GPI0 Media Selected
0 1 0 Internal PHY
0 1 1 Internal PHY
0 0 0 External MII PHY
0 0 1 Internal PHY
1 X X Depend on MPSET bit
3:1
-
Reserved
0
/GPO0 Default “0”. The register reflects to GPO[0] pin with inverted value.
DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AX88796L | 3-in-1 Local Bus Fast Ethernet Controller |
| AY3-8910 | PROGRAMMABLE SOUND GENERATOR |
| AY-3-8910 | PROGRAMMABLE SOUND GENERATOR |
| AY-3-8912 | PROGRAMMABLE SOUND GENERATOR |
| AY-3-8913 | PROGRAMMABLE SOUND GENERATOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AX88796ALF | 制造商:ASIX 功能描述:10/100 MAC,COMMERCIAL 128PIN |
| AX88796BLF | 制造商:Asix Electronics 功能描述:IEEE802.3 / IEEE802.3u LAN standard Ethernet 3.3V 64LQFP Tray 制造商:ASIX 功能描述:10/100 MAC,COMMERCIAL 64PIN |
| AX88796BLI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High-Performance Non-PCI Single-Chip 8/16 bit 10/100M Fast Ethernet Controller |
| AX88796C | 制造商:ASIX 制造商全稱:ASIX 功能描述:Low-Power SPI or Non-PCI Ethernet Controller |
| AX88796CLF | 制造商:ASIX Electronics Corporation 功能描述: |
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