- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄366550 > AM79C972BVCW (ADVANCED MICRO DEVICES INC) PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support PDF資料下載
參數(shù)資料
| 型號： | AM79C972BVCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| 中文描述： | 5 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP176 |
| 封裝： | TQFP-176 |
| 文件頁數(shù)： | 92/130頁 |
| 文件大?。?/td> | 1580K |
| 代理商： | AM79C972BVCW |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁當(dāng)前第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁
92
Am79C972
Table 16.
PCI Configuration Space Layout
The Am79C972 controller supports mapping the ad-
dress space to both I/O and memory space. The value
in the PCI I/O Base Address register determines the
start address of the I/O address space. The register is
typically programmed by the PCI configuration utility
after system power-up. The PCI configuration utility
must also set the IOEN bit in the PCI Command register
to enable I/O accesses to the Am79C972 controller. For
memory mapped I/O access, the PCI Memory Mapped
I/O Base Address register controls the start address of
the memory space. The MEMEN bit in the PCI Com-
mand register must also be set to enable the mode. Both
base address registers can be active at the same time.
The Am79C972 controller supports two modes for ac-
cessing the I/O resources. For backwards compatibility
with AMD
’
s 16-bit Ethernet controllers, Word I/O is the
default mode after power up. The device can be config-
ured to DWord I/O mode by software.
I/O Registers
The Am79C972 controller registers are divided into two
groups. The Control and Status Registers (CSR) are
used to configure the Ethernet MAC engine and to ob-
tain status information. The Bus Control Registers
(BCR) are used to configure the bus interface unit and
the LEDs. Both sets of registers are accessed using in-
direct addressing.
The CSR and BCR share a common Register Address
Port (RAP). There are, however, separate data ports.
The Register Data Port (RDP) is used to access a
CSR. The BCR Data Port (BDP) is used to access a
BCR.
In order to access a particular CSR location, the RAP
should first be written with the appropriate CSR ad-
dress. The RDP will then point to the selected CSR. A
read of the RDP will yield the selected CSR data. A
write to the RDP will write to the selected CSR. In order
to access a particular BCR location, the RAP should
first be written with the appropriate BCR address. The
BDP will then point to the selected BCR. A read of the
BDP will yield the selected BCR data. A write to the
BDP will write to the selected BCR.
Once the RAP has been written with a value, the RAP
value remains unchanged until another RAP write oc-
curs, or until an H_RESET or S_RESET occurs. RAP
is cleared to all 0s when an H_RESET or S_RESET oc-
curs. RAP is unaffected by setting the STOP bit.
Address PROM Space
The Am79C972 controller allows for connection of a
serial EEPROM. The first 16 bytes of the EEPROM will
be automatically loaded into the Address PROM
(APROM) space after H_RESET. Additionally, the first
six bytes of the EEPROM will be loaded into CSR12 to
CSR14. The Address PROM space is a convenient
place to store the value of the 48-bit IEEE station ad-
dress. It can be overwritten by the host computer and
its content has no effect on the operation of the control-
ler. The software must copy the station address from
the Address PROM space to the initialization block in
31 24
23 16
15 8
7 0
Offset
00h
04h
08h
0Ch
10h
14h
18h
1Ch
20h
24h
28h
2Ch
30h
34h
38h
3Ch
40h
44H
.
.
FCh
Device ID
Status
Vendor ID
Command
Base-Class
Reserved
Sub-Class
Header Type
Programming IF
Latency Timer
Revision ID
Reserved
I/O Base Address
Memory Mapped I/O Base Address
Reserved
Reserved
Reserved
Reserved
Reserved
Subsystem ID
Subsystem Vendor ID
Expansion ROM Base Address
Reserved
Reserved
MIN_GNT
CAP-PTR
MAX_LAT
Interrupt Pin
NXT_ITM_PTR
Interrupt Line
CAP_ID
PMC
DATA_REG
PMCSR_BSE
PMCSR
Reserved
Reserved
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM79C972 | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BVIW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C974 | PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems |
| AM79C974KCW | PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems |
| AM79C975 | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C972BVD\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C972BVD\W | 制造商:Advanced Micro Devices 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 176-Pin TQFP Tray |
| AM79C972BVIW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C973 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C973/75 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Board Layout Considerations for the Am79C973/75 Network Interface? - (PDF) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。