參數(shù)資料
型號： AM79C972BVCW
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
中文描述： 5 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP176
封裝： TQFP-176
文件頁數(shù)： 83/130頁
文件大?。?/td> 1580K
代理商： AM79C972BVCW
Am79C972
83
Table 10.
EEPROM Map
The LED pins can be configured to operate in either
open-drain mode (active low) or in totem-pole mode
(active high). The output can be stretched to allow the
human eye to recognize even short events that last only
several microseconds. After H_RESET, the four LED
outputs are configured as shown in Table 11.
Word
Address
Byte
Address
Most Significant Byte
Byte
Address
Least Significant Byte
First byte of the ISO 8802-3 (IEEE/ANSI
802.3) station physical address for this
node, where
“
first byte
”
refers to the first
byte to appear on the 802.3 medium.
3rd byte of the node address
5th byte of the node address
CSR116[7:0] (OnNow Misc. Config.)
00h*
01h
2nd byte of the ISO 8802-3 (IEEE/ANSI 802.3)
station physical address for this node.
00h
01h
02h
03h
03h
05h
07h
4th byte of the node address
6th byte of the node address
CSR116[15:8] (OnNow Misc. Config.)
Hardware ID; must be 11h if compatibility to
AMD drivers is desired
User programmable space
02h
04h
06h
04h
09h
08h
Reserved location: must be 00h
05h
0Bh
0Ah
User programmable space
LSB of two-byte checksum, which is the
sum of bytes 00h-0Bh and bytes 0Eh and
0Fh
Must be ASCII
“
W
”
(57h) if compatibility to
AMD driver software is desired
BCR2[7:0] (Miscellaneous Configuration)
BCR4[7:0] (Link Status LED)
BCR5[7:0] (LED1 Status)
BCR6[7:0] (LED2 Status)
BCR7[7:0] (LED3 Status)
BCR9[7:0] (Full-Duplex Control)
BCR18[7:0] (Burst and Bus Control)
BCR22[7:0] (PCI Latency)
BCR23[7:0] (PCI Subsystem Vendor ID)
BCR24[7:0] (PCI Subsystem ID)
BCR25[7:0] (SRAM Size)
BCR26[7:0] (SRAM Boundary)
BCR27[7:0] (SRAM Interface Control)
BCR32[7:0] (MII Control and Status)
BCR33[7:0] (MII Address)
BCR35[7:0] (PCI Vendor ID)
BCR36[7:0] (Conf. Space byte 42h alias)
BCR37[7:0] (Conf. Space byte 47h 0 alias)
BCR38[7:0] (Conf. Space. byte 47h 1 alias)
BCR39[7:0] (Conf. Space. byte 47h 2 alias)
BCR40[7:0] (Conf. Space. byte 47h 3 alias)
BCR41[7:0] (Conf. Space. byte 47h 4 alias)
BCR42[7:0] (Conf. Space. byte 47h 5 alias)
BCR43[7:0] (Conf. Space. byte 47h 6 alias)
BCR44[7:0] (Conf. Space. byte 47h 7 alias)
06h
0Dh
MSB of two-byte checksum, which is the sum
of bytes 00h-0Bh and bytes 0Eh and 0Fh
0Ch
07h
0Fh
Must be ASCII
“
W
”
(57h) if compatibility to
AMD driver software is desired
BCR2[15:8] (Miscellaneous Configuration)
BCR4[15:8] (Link Status LED)
BCR5[15:8] (LED1 Status)
BCR6[15:8] (LED2 Status)
BCR7[15:8] (LED3 Status)
BCR9[15:8] (Full-Duplex Control)
BCR18[15:8] (Burst and Bus Control)
BCR22[15:8] (PCI Latency)
BCR23[15:8] (PCI Subsystem Vendor ID)
BCR24[15:8] (PCI Subsystem ID)
BCR25[15:8] (SRAM Size)
BCR26[15:8] (SRAM Boundary)
BCR27[15:8] (SRAM Interface Control)
BCR32[15:8] (MII Control and Status)
BCR33[15:8] (MII Address)
BCR35[15:8] (PCI Vendor ID)
BCR36[15:8] (Conf. Space byte 43h alias)
BCR37[15:8] (DATA_SCALE alias 0)
BCR38[15:8] (DATA_SCALE alias 1)
BCR39[15:8] (DATA_SCALE alias 2)
BCR40[15:8] (DATA_SCALE alias 3)
BCR41[15:8] (DATA_SCALE alias 4)
BCR42[15:8] (DATA_SCALE alias 0)
BCR43[15:8] (DATA_SCALE alias 0)
BCR44[15:8] (DATA_SCALE alias 0)
Checksum adjust byte for the 68 bytes of the
EEPROM contents. Checksum of the 68 bytes
of the EEPROM should total FFh.
0Eh
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
11h
13h
15h
17h
19h
1Bh
1Dh
1Fh
21h
23h
25h
27h
29h
2Bh
2Dh
2Fh
31h
33h
35h
75h
39h
3Bh
3Dh
3Fh
41h
10h
12h
14h
16h
18h
1Ah
1Ch
1Eh
20h
22h
24h
26h
28h
2Ah
2Ch
2Eh
30h
32h
34h
36h
38h
3Ah
3Ch
3Eh
40h
21h
43h
42h
Reserved location: must be 00h
Unused locations - Ignored by device
3Fh
7Fh
Reserved
7Eh
Reserved
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