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參數(shù)資料
| 型號： | AM79C961AVCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| 中文描述： | 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144 |
| 封裝： | TQFP-144 |
| 文件頁數(shù)： | 193/206頁 |
| 文件大小： | 1507K |
| 代理商： | AM79C961AVCW |
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Am79C961A
193
S6: After the ownership of descriptor number 2 has
been changed by the PCnet-ISA II controller, the
next driver poll of the 2nd descriptor will show
ownership granted to the CPU. The driver now
copies the data from buffer number 2 into the
“
middle section
”
of the application buffer space.
This operation is interleaved with the C7 and C8
operations.
C8: The PCnet-ISA II controller will perform data DMA
to the last buffer, whose pointer is pointing to
application space. Data entering the last buffer
will not need the infamous
“
double copy
”
that is
required by existing drivers, since it is being
placed directly into the application buffer space.
N2: The message on the wire ends.
S7: When the driver completes the copy of buffer
number 2 data to the application buffer space, it
begins polling descriptor number 3.
C9: When the PCnet-ISA II controller has finished all
data DMA operations, it writes status and changes
ownership of descriptor number 3.
S8: The driver sees that the ownership of descriptor
number 3 has changed, and it calls the application
to tell the application that a frame has arrived.
S9: The application processes the received frame and
generates the next TX frame, placing it into a TX
buffer.
S10:The driver sets up the TX descriptor for the PC-
net-ISA II controller.
19364B-87
Figure 1.
Look Ahead Packet Processing (LAPP) Timeline
Buffer
#3
Buffer
#2
Buffer
#1
Ethernet
Wire
activity:
Ethernet
Controller
activity:
Software
activity:
S10: Driver sets up TX descriptor.
S9: Application processes packet, generates TX packet.
S8: Driver calls application
to tell application that
packethas arrived.
}
S7: Driver polls descriptor of buffer #3.
S6: Driver copies data from buffer #2 to the application
buffer.
S5: Driver polls descriptor #2.
S4: Driver copies data from buffer #1 to the application
buffer.
S3: Driver writes modified application
pointer to descriptor #3.
S2: Driver call to application to
get application buffer pointer.
S1: Interrupt latency.
S0: Driver is idle.
N2:EOM
N0: Packet preamble, SFD
and destination address
are arriving.
{
P
}}
C9: Controller writes descriptor #3.
C8: Controller is performing intermittent
bursts of DMA to fill data buffer #3.
C7: Controller writes descriptor #2.
C6: "Last chance" lookahead to
descriptor #3 (OWN).
C5: Controller is performing intermittent
bursts of DMA to fill data buffer #2
C3: SRP interrupt is
generated.
C2: Controller writes descriptor #1.
C1: Controller is performing intermittent
bursts of DMA to fill data buffer #1.
C0: Lookahead to descriptor #2.
N1: 64th byte of packet
data arrives.
C4: Lookahead to descriptor #3 (OWN).
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C961AVI | 制造商:Rochester Electronics LLC 功能描述: |
| AM79C961AVI/W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
| AM79C961AVI\\W | 制造商:Rochester Electronics LLC 功能描述: |
| AM79C961AVI\W | 制造商:Rochester Electronics LLC 功能描述: |
| AM79C961AVIW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
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