參數(shù)資料
型號(hào): AM79C961AKIW
廠商: ADVANCED MICRO DEVICES INC
元件分類: 微控制器/微處理器
英文描述: PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
中文描述: 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP132
封裝: PLASTIC, QFP-132
文件頁(yè)數(shù): 91/206頁(yè)
文件大?。?/td> 1507K
代理商: AM79C961AKIW
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)當(dāng)前第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)
Am79C961A
91
to be inserted. The PCnet-ISA II controller will append
pad bytes dependent on the actual number of bits
transmitted onto the network. Once the last data byte of
the frame has completed prior to appending the FCS,
the PCnet-ISA II controller will check to ensure that 544
bits have been transmitted. If not, pad bytes are added
to extend the frame size to this value, and the FCS is
then added.
The 544 bit count is derived from the following:
Minimum frame size (excluding preamble,
including FCS)
Preamble/SFD size
FCS size
To be classed as a minimum-size frame at the receiver,
the transmitted frame must contain:
64 bytes
8 bytes
4 bytes
512 bits
64 bits
32 bits
Preamble
+
(Min Frame Size + FCS) bits
At the point that FCS is to be appended, the transmitted
frame should contain:
Preamble
64+
+
(Min Frame Size - FCS) bits
(512-
32) bits
A minimum-length transmit frame from the PCnet-ISA
II controller will, therefore, be 576 bits after the FCS is
appended.
Transmit FCS Generation
Automatic generation and transmission of FCS for a
transmit frame depends on the value of DXMTFCS bit
in CSR15. When DXMTFCS = 0 the transmitter will
generate and append the FCS to the transmitted frame.
If the automatic padding feature is invoked
(APAD_XMT is SET in CSR4), the FCS will be
appended by the PCnet-ISA II controller regardless of
the state of DXMTFCS. Note that the calculated FCS is
transmitted most-significant bit first. The default value
of DXMTFCS is 0 after RESET.
Transmit Exception Conditions
Exception conditions for frame transmission fall into
two distinct categories; those which are the result of
normal network operation, and those which occur due
to abnormal network and/or host related events.
Normal events which may occur and which are handled
autonomously by the PCnet-ISA II controller are basi-
cally collisions within the slot time with automatic retry.
The PCnet-ISA II controller will ensure that collisions
which occur within 512 bit times from the start of trans-
mission (including preamble) will be automatically
retried with no host intervention. The transmit FIFO en-
sures this by guaranteeing that data contained within
the FIFO will not be overwritten until at least 64 bytes
(512 bits) of data have been successfully transmitted
onto the network.
If 16 total attempts (initial attempt plus 15 retries) fail,
the PCnet-ISA II controller sets the RTRY bit in the cur-
rent transmit TDTE in host memory (TMD2), gives up
ownership (sets the OWN bit to zero) for this packet,
and processes the next packet in the transmit ring for
transmission.
ISO 8802-3 (IEEE/ANSI 802.3) Data Frame
Preamble
1010....1010
SYNC
10101011
Dest.
ADDR
SRCE.
ADDR.
Length
LLC
Data
Pad
FCS
56
Bits
8
Bits
6
Bytes
6
Bytes
2
Bytes
46-1500
Bytes
4
Bytes
19364B-20
相關(guān)PDF資料
PDF描述
AM79C961AVCW PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961AVIW PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
Am79C965A PCnet?-32 Single-Chip 32-Bit Ethernet Controller
AM79C970AKCW PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C961APDLUTS 制造商:Advanced Micro Devices 功能描述:
AM79C961AVC 制造商:Rochester Electronics LLC 功能描述: 制造商:Advanced Micro Devices 功能描述:LAN Node Controller, 144 Pin, TQFP
AM79C961AVC/W 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller
AM79C961AVC\\W 制造商:Rochester Electronics LLC 功能描述:
AM79C961AVC\W 制造商:Rochester Electronics LLC 功能描述: