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參數資料
| 型號： | ADS7870EA |
| 英文描述： | 12-Bit ADC, MUX, PGA and Internal Reference DATA ACQUISITION SYSTEM |
| 中文描述： | 12位ADC，復用器，PGA和內部基準數據采集系統(tǒng) |
| 文件頁數： | 14/27頁 |
| 文件大?。?/td> | 262K |
| 代理商： | ADS7870EA |
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ADS7870
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0
A1
A2
A3
A4
1
0
0
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
SCLK
DIN
DOUT
CS
Both Bytes Updated
Instruction Latched
Data for ADDR
Data for ADDR + 1
FIGURE 4. Example Timing Diagram for a 16-Bit Write Operation to an Even Address.
READ OPERATION
A read operation is similar to a write operation except that
data flow (after the instruction byte) is from the ADS7870 to
the host controller. After the instruction byte has been
latched (on the eighth active edge of SCLK) the DOUT pin
(and the DIN pin if in two-wire mode) will begin driving
data on the next non-active edge of SCLK. This allows the
host controller to have valid data on the next active edge of
SCLK.
The data on DOUT (or DIN) will transition on non-active
edges of SCLK. The DIN pin (two-wire mode) will cease
driving data (return to high impedance) on the non-active
edge of SCLK following the eighth (or sixteenth) active
edge of the read data. DOUT is only high impedance when
CS is not asserted. With CS high (“1”), DOUT (or DIN) is
forced to high impedance mode. In general, the ADS7870 is
insensitive to the idle state of the clock except that the state
of SCLK may determine if the DIN is driving data or not.
Upon completion of the read operation, the ADS7870 will
be ready to receive the next instruction byte. Read opera-
tions will reflect the state of the ADS7870 on the first active
edge of SCLK of the data byte transferred.
Figure 5 shows an example of an eight-bit read operation
with LSB first and SCLK active on the rising edge. The
double rising arrows indicate when the instruction is latched.
The first bit of data is sampled on the first active SCLK edge
of the read portion of the instruction. The remaining bits are
sampled on the next inactive SCLK edge.
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A0
A1
A2
A3
A4
0
1
0
D0
D1
D2
D3
D4
D5
D6
D7
SCLK
DIN
DOUT
CS
FIGURE 5. Example Timing Diagram for an 8-Bit Read Operation.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ADS7870EA/1K | 功能描述:模數轉換器 - ADC 12-Bit ADC MUX PGA RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7870EA/1KG4 | 功能描述:模數轉換器 - ADC 12-Bit ADC MUX PGA RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7870EA/250 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 12-Bit |
| ADS7870EAG4 | 功能描述:模數轉換器 - ADC 12-Bit ADC MUX PGA RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7870EVM | 功能描述:數據轉換 IC 開發(fā)工具 ADS7870 Eval Mod RoHS:否 制造商:Texas Instruments 產品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
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