參數(shù)資料
型號(hào): ADS7870EA
英文描述: 12-Bit ADC, MUX, PGA and Internal Reference DATA ACQUISITION SYSTEM
中文描述: 12位ADC,復(fù)用器,PGA和內(nèi)部基準(zhǔn)數(shù)據(jù)采集系統(tǒng)
文件頁(yè)數(shù): 10/27頁(yè)
文件大?。?/td> 262K
代理商: ADS7870EA
10
ADS7870
is captured, the offset voltage of the PGA is auto-zeroed, and
the signal is amplified. The PGA is allowed to settle to the
0.01% accuracy necessary for 12-bit, 1/2 LSB accuracy. The
successive approximation conversion of the A/D converter
takes the last 12 DCLK cycles.
During this clock sequence the input capacitance associated
with a selected channel changes from 6pF to 9.7pF, to 6pF,
to 7pF and finally to 6pF. When the ADS7870 is not
converting, a channel provides a load capacitance of 4pF.
This changing of the capacitive load at a LNx pin can cause
the voltage at the pin to vary on the DCLK transitions when
the internal capacitors are switched in and out of the circuit.
At the clock speeds associated with the ADS7870, the input
pin voltages settle to final value quickly enough that the
transitions are of no significance to the A/D conversion
result.
Starting an A/D Conversion Cycle
There are four ways to cause the ADS7870 to perform a
conversion:
1) Send a Direct Mode instruction.
2) Write to Register 4 with the CNV bit = “1”.
3) Write to Register 5 with the CNV bit = “1”.
4) Assert the CONVERT pin (Logic high.)
–V
REF
+V
REF
0111 1111 1111 (+2047)
0111 1111 1110 (+2046)
Negative Full Scale Transition
1000 0000 0001 (–2047)
1000 0000 0000 (–2048)
1111 1111 1111(–1)
1111 1111 1110(–2)
Zero Transition
Output Code is 2’s Complement
Positive Full Scale Transition
0000 0000 0010 (2)
0000 0000 0001 (1)
0000 0000 0000 (0)
INPUT VOLTAGE
O
FIGURE 2. Output Codes versus Input Voltage.
SERIAL INTERFACE
The ADS7870 communicates with microprocessors and other
external circuitry through a digital serial port interface. It is
compatible with a wide variety of popular micro-controllers,
including Motorola 68HC11, Intel 80C51, and MicroChip
PIC Series.
The serial interface consists of four primary pins, SCLK
(serial bit clock), DIN (serial data input), DOUT (serial data
output) and CS (chip select). SCLK synchronizes the data
transfer with each bit being transmitted on the falling or
rising SCLK edge as determined by the RISE/FALL pin.
SDIN may also be used as a serial data output line.
Additional pins expand the versatility of the basic serial
interface and allow it to be used with different micro-
controllers. The RISE/FALL pin configures the ADS7870 to
respond to either the rising or falling edge of SCLK for
transferring serial data. The BUSY pin indicates when a
conversion is in progress and may be used to generate
interrupts for the micro-controller. The CONVERT pin can
be used as a hardware means of causing the ADS7870 to
start a conversion cycle. The RESET pin can be toggled in
order to reset the ADS7870 to the power-on state. Four
general purpose digital I/O pins (I/O3-I/O0) are also pro-
vided.
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