參數(shù)資料
型號(hào): AD9992BBCZRL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 80/92頁(yè)
文件大?。?/td> 0K
描述: IC CCD SGNL PROC 12BIT 105CSPBGA
產(chǎn)品變化通告: AD9992 Discontinuation 22/Feb/2012
標(biāo)準(zhǔn)包裝: 2,000
類型: CCD 信號(hào)處理器,12 位
輸入類型: 邏輯
輸出類型: 邏輯
接口: 3 線串口
電流 - 電源: 27mA
安裝類型: 表面貼裝
封裝/外殼: 105-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 105-CSPBGA(8x8)
包裝: 帶卷 (TR)
AD9992
Rev. C | Page 81 of 92
Address
Data Bits
Default
Value
Update
Type
Mnemonic
Description
[10]
1
SEL_GP3
1: GP3 signal is selected for GPO3 output.
[11]
1
SEL_GP4
1: GP4 signal is selected for GPO4 output.
0: SUBCK is selected.
[12]
1
SEL_GP5
1: GP5 signal is selected for GPO5 output.
0: XV21 is selected.
[13]
1
SEL_GP6
1: GP6 signal is selected for GPO6 output.
0: XV22 is selected.
[14]
1
SEL_GP7
1: GP7 signal is selected for GPO7 output.
0: XV23 is selected.
[15]
1
SEL_GP8
1: GP8 signal is selected for GPO8 output.
0: XV24 is selected.
[23:16]
0
GPO_OUTPUT_EN
1: GPO outputs enabled.
0: GPO is input high-Z state (default).
[24]
0
GPO5_OVERRIDE
1: When GPO5 configured as input, overrides internal
OUT_CONT.
[25]
0
GPO6_OVERRIDE
1: When GPO6 configured as input, overrides internal
HBLK.
[26]
0
GPO7_OVERRIDE
1: When GPO7 configured as input, overrides internal
CLPOB.
[27]
0
GPO8_OVERRIDE
1: When GPO8 configured as input, overrides internal
PBLK.
0x79
[7:0]
0
VD
GP*_USE_LUT
Use result from LUT, or else GP* is unaltered.
[11:8]
{0, 0, 0, 0}
LUT_FOR_GP12
Two-input look-up table results.
[15:12]
{0, 0, 0, 0}
LUT_FOR_GP34
Examples: {LUT_FOR_GP12}
[GP2:GP1].
[19:16]
{0, 0, 0, 0}
LUT_FOR_GP56
{0, 1, 1, 0} = GP2 XOR GP1; {1, 1, 1, 0} = GP2 OR GP1.
[23:20]
{0, 0, 0, 0}
LUT_FOR_GP78
{0, 1, 1, 1} = GP2 NAND GP1; {1, 0, 0, 0} = GP2 AND GP1.
0x7A
[12:0]
0
VD
GP1_TOG1_FD
General-Purpose Signal 1, first toggle position, field
location.
[25:13]
0
GP1_TOG1_LN
General-Purpose Signal 1, first toggle position, line
location.
0x7B
[12:0]
0
VD
GP1_TOG1_PX
General-Purpose Signal 1, first toggle position, pixel
location.
[25:13]
0
GP1_TOG2_FD
General-Purpose Signal 1, second toggle position, field
location.
0x7C
[12:0]
0
VD
GP1_TOG2_LN
General-Purpose Signal 1, second toggle position, line
location.
[25:13]
0
GP1_TOG2_PX
General-Purpose Signal 1, second toggle position, pixel
location.
0x7D
[12:0]
0
VD
GP1_TOG3_FD
General-Purpose Signal 1, third toggle position, field
location.
[25:13]
0
GP1_TOG3_LN
General-Purpose Signal 1, third toggle position, line
location.
0x7E
[12:0]
0
VD
GP1_TOG3_PX
General-Purpose Signal 1, third toggle position, pixel
location.
[25:13]
0
GP1_TOG4_FD
General-Purpose Signal 1, fourth toggle position, field
location.
0x7F
[12:0]
0
VD
GP1_TOG4_LN
General-Purpose Signal 1, fourth toggle position, line
location.
[25:13]
0
GP1_TOG4_PX
General-Purpose Signal 1, fourth toggle position, pixel
location.
0x80
[12:0]
0
VD
GP2_TOG1_FD
General-Purpose Signal 2, first toggle position, field
location.
[25:13]
0
GP2_TOG1_LN
General-Purpose Signal 2, first toggle position, line
location.
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