參數(shù)資料
型號: A48P3616
廠商: AMIC Technology Corporation
英文描述: CAP 270PF 50V CERAMIC MONO 5%
中文描述: 8米× 16位DDR內(nèi)存
文件頁數(shù): 28/62頁
文件大?。?/td> 2214K
代理商: A48P3616
Preliminary
A48P3616
8M X 16 Bit DDR DRAM
Preliminary (September 2005, Version 0.0)
27
AMIC Technology, Corp.
Current State Bank n - Command to Bank n (Same Bank)
Current State
CS
RAS
CAS
WE
Command
Action
Note
H
X
X
X
Deselect
NOP. Continue previous operation
NOP. Continue previous operation
Select and Activate Row
Select column and start Read Burst
Select column and start Write Burst
Deactivate row in bank(s)
Select column and start new Read Burst
Burst Terminate
Select column and start Read Burst
Select column and start Write Burst
Truncate Write burst, start Precharge
1-6
Any
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
H
H
L
H
L
H
H
H
L
H
H
L
L
L
L
H
L
H
H
L
L
H
H
H
H
L
H
L
L
H
L
L
H
L
L
No Operation
Active
Auto Refresh
Mode Register Set
Read
Write
Precharge
Read
Precharge
Burst Terminate
Read
Write
Precharge
1-6
1-6
1-7
1-7
1-6, 10
1-6, 10
1-6, 8
1-6, 10
1-6, 8
1-6, 9
1-6, 10, 11
1-6, 10
1-6, 8, 11
Idle
Row Active
Read
(Auto Precharge
Disabled)
Write
(Auto Precharge
Disabled)
Note:
1. This table applies when CKE n-1 was high and CKE n is high (see Truth Table 2: Clock Enable (CKE) and after t
XSNR
/ t
XSRD
has been met (if the previous state was self refresh).
2. This table is bank-specific, except where noted, i.e., the current state is for a specific bank and the commands shown are those
allowed to be issued to that bank when in that state. Exceptions are covered in the notes below.
3. Current state definitions:
Idle:
The bank has been precharged, and t
RP
has been met.
Row Active:
A row in the bank has been activated, and t
RCD
has been met. No data bursts/accesses and no register accesses
are in progress.
Read:
A Read burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
Write:
A Write burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
4. The following states must not be interrupted by a command issued to the same bank.
Precharging:
Starts with registration of a Precharge command and ends when t
RP
is met. Once t
RP
is met, the bank is in the idle
state.
Row Activating:
Starts with registration of an Active command and ends when t
RCD
is met. Once t
RCD
is met, the bank is in the
“row active” state.
Read w/Auto Precharge Enabled:
Starts with registration of a Read command with Auto Precharge enabled and ends when t
RP
has been met. Once t
RP
is met, the bank is in the idle state.
Write w/Auto Precharge Enabled:
Starts with registration of a Write command with Auto Precharge enabled and ends when t
RP
has been met. Once t
RP
is met, the bank is in the idle state.
Deselect or NOP commands, or allowable commands to the other bank should be issued on any clock edge occurring during
these states. Allowable commands to the other bank are determined by its current state and according to Truth Table 4.
5. The following states must not be interrupted by any executable command; Deselect or NOP commands must be applied on
each positive clock edge during these states.
Refreshing:
Starts with registration of an Auto Refresh command and ends when t
RFC
is met. Once t
RFC
is met, the DDR SDRAM
is in the “all banks idle” state.
Accessing Mode Register:
Starts with registration of a Mode Register Set command and ends when t
MRD
has been met. Once
t
MRD
is met, the DDR SDRAM is in the “all banks idle” state.
Precharging All:
Starts with registration of a Precharge All command and ends when t
RP
is met. Once t
RP
is met, all banks is in
the idle state.
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle.
8. May or may not be bank-specific; if all/any banks are to be precharged, all/any must be in a valid state for precharging.
9. Not bank-specific; Burst terminate affects the most recent Read burst, regardless of bank.
10. Reads or Writes listed in the Command/Action column include Reads or Writes with Auto Precharge enabled and Reads or
Writes with Auto Precharge disabled.
11. Requires appropriate DM masking.
相關(guān)PDF資料
PDF描述
A48P4616 CAP 330PF 50V CERAMIC MONO 5%
A49FL004TX-33F 4 Mbit CMOS 3.3Volt-only Firmware Hub/LPC Flash Memory
A49FL004 4 Mbit CMOS 3.3Volt-only Firmware Hub/LPC Flash Memory
A49FL004TL-33 4 Mbit CMOS 3.3Volt-only Firmware Hub/LPC Flash Memory
A49FL004TL-33F 4 Mbit CMOS 3.3Volt-only Firmware Hub/LPC Flash Memory
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A48P36AL 制造商:Pentair Technical Products / Hoffman 功能描述:Panel 45.00x33.00 fits 48.00x3 , fits 48x36, Aluminum
A-48P36AL 制造商:Pentair Technical Products / Hoffman 功能描述:Panel 45.00x33.00 fits 48.00x3 制造商:PENTAIR TECNICAL PRODCUTS 功能描述:Panel 45.00x33.00 fits 48.00x3
A48P36G 制造商:Pentair Technical Products / Hoffman 功能描述:Enclosure, Panel, 1.25x33.25x45.75
A-48P36G 制造商:Pentair Technical Products / Hoffman 功能描述:PANEL, ENCLOSURE, 45INX33IN, STEEL, Panel Material:Steel, Body Color:-, For Use With:NEMA 3R, 4, 4X, 12 , and 13 Enclosures, External Height - Imperial:45", External Height - Metric:1143mm, External Width - Imperial:33" , RoHS Compliant: Yes 制造商:PENTAIR TECNICAL PRODCUTS 功能描述:PANEL, ENCLOSURE, 45INX33IN, STEEL, Panel Material:Steel, Body Color:(Not Applic
A48P36SS6 制造商:Pentair Technical Products / Hoffman 功能描述:Panel 45.00x33.00 fits 48.00x3 , fits 48x36, SS Type 316